LM77CIMX-5/NOPB National Semiconductor, LM77CIMX-5/NOPB Datasheet - Page 11

• Manufacturer Part Number: LM77CIMX-5/NOPB
• Description: IC TEMP SENSOR DIGITAL 8-SOIC
• Manufacturer: National Semiconductor

Specifications of LM77CIMX-5/NOPB

• Function: Temp Monitoring System (Sensor)
• Topology: ADC, Comparator, Register Bank
• Sensor Type: Internal
• Sensing Temperature: -55°C ~ 125°C
• Output Type: I²C™
• Output Alarm: Yes
• Output Fan: No
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -55°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *LM77CIMX-5; *LM77CIMX-5/NOPB; LM77CIMX-5

1.9 POINTER REGISTER
(Selects which registers will be read from or written to):
P0–P2: Register Select:
P3–P7: Must be kept zero.
1.10 TEMPERATURE REGISTER
(Read Only):
D0–D2: Status Bits
1.11 CONFIGURATION REGISTER
(Read/Write):
D0: Shutdown - When set to 1 the LM77 goes to low power
shutdown mode. Power up default of “0”.
D1: Interrupt mode - 0 is Comparator Interrupt mode, 1 is
Event Interrupt mode. Power up default of “0”.
D2, D3: T_CRIT_A and INT Polarity - 0 is active low, 1 is ac-
tive high. Outputs are open-drain. Power up default of “0”
1.12 T
(Read/Write):
D0–D2: Undefined
D3–D15: T
Data. Power up default is T
= 80°C, T
Sign
Sign
D15
D15
HYST
D7
0
Sign
Sign
D14
D14
HYST
, T
HYST
LOW
= 2°C.
, T
, T
Sign
Sign
D13
D13
LOW
HIGH
, T
D6
0
AND T_CRIT_A REGISTERS
HIGH
Sign
Sign
D12
D12
LOW
or T_CRIT Trip Temperature
= 10°C, T
P2
MSB
MSB
D11
D11
0
0
0
0
1
1
P7
0
D5
0
HIGH
P1
0
0
1
1
0
0
Bit 7
D10
D10
Bit7
P6
0
= 64°C, T_CRIT
P0
0
1
0
1
0
1
Bit 6
Fault Queue
Bit6
D9
D9
P5
0
Temperature (Read only) (Power-up default)
Configuration (Read/Write)
T
T_CRIT (Read/Write)
T
T
HYST
LOW
HIGH
D4
Bit 5
Bit5
(Read/Write)
(Read/Write)
D8
D8
P4
(Read/Write)
0
11
Bit 4
Bit 4
INT Polarity
P3
D7
D7
0
D3–D15: Temperature Data. One LSB = 0.5°C. Two's com-
plement format.
D4: Fault Queue - When set to 1 the Fault Queue is enabled,
see Section 1.7. Power up default of “0”.
D5–D7: These bits are used for production testing and must
be kept zero for normal operation.
T
T
Avoid programming setpoints so close that their hysteresis
values overlap. See Section 1.1.
HYST
LOW
Register
D3
.
Bit 3
Bit 3
P2
is subtracted from T
D6
D6
Register Select
P1
Bit 2
Bit 2
T_CRIT_A
D5
D5
Polarity
D2
P0
Bit 1
Bit 1
D4
D4
HIGH
Bit 0
Bit 0
INT Mode
D3
D3
, and T_CRIT, and added to
D1
CRIT
D2
D2
X
Status Bits
HIGH
Shutdown
D1
D1
X
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D0
LOW
D0
D0
X