ADT7473ARQZ-1R7 ON Semiconductor, ADT7473ARQZ-1R7 Datasheet - Page 23

IC THERM MON FAN CTLR 16-QSOP

ADT7473ARQZ-1R7

Manufacturer Part Number
ADT7473ARQZ-1R7
Description
IC THERM MON FAN CTLR 16-QSOP
Manufacturer
ON Semiconductor
Series
dBCool®r
Datasheet

Specifications of ADT7473ARQZ-1R7

Function
Fan Control, Temp Monitor
Topology
ADC, Comparator, Fan Speed Counter, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
-40°C ~ 125°C, External Sensor
Output Type
SMBus™
Output Alarm
No
Output Fan
Yes
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-QSOP
Full Temp Accuracy
+/- 0.5 C
Digital Output - Bus Interface
Serial (3-Wire, 4-Wire)
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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SMBALERT if this bit is set to 1; however, the F4P bit of
Interrupt Status Register 2 still is set if the THERM timer
limit is exceeded.
timer, limit, and associated circuitry. Writing a value of 0x00
to the THERM timer limit register (0x7A) causes an
SMBALERT to be generated on the first THERM assertion.
A THERM timer limit value of 0x01 generates an
SMBALERT once cumulative THERM assertions exceed
45.52 ms.
Configuring the THERM Behavior
Figure 33 is a functional block diagram of the THERM
1. Configure Pin 9 as a THERM timer input. Setting
2. Select the desired fan behavior for THERM timer
Bit 1 (THERM timer enable) of Configuration
Register 3 (0x78) enables the THERM timer
monitoring functionality. This is disabled on Pin 9
by default. Setting Bit 0 and Bit 1 (PIN9FUNC) of
Configuration Register 4 (0x7D) enables THERM
timer/output functionality on Pin 9 (Bit 1 of
Configuration Register 3, THERM, must also be
set). Pin 9 can also be used as TACH4. Setting
Bit 5, Bit 6, and Bit 7 of Configuration Register 5
(0x7C) makes THERM bidirectional. This means
that if the appropriate temperature channel exceeds
the THERM temperature limit, the THERM output
asserts. If the ADT7473 is not pulling THERM low,
but THERM is pulled low by an external device
(such as a CPU overtemperature signal), the
THERM timer also times THERM assertions. If
Bit 5, Bit 6, and Bit 7 of Configuration Register 5
(0x7C) are set to 0, THERM is set as a timer input
only.
events. Assuming the fans are running, setting
Bit 2 (BOOST) of Configuration Register 3 (0x78)
causes all fans to run at 100% duty cycle whenever
THERM is asserted. This allows fail−safe system
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23
when the system is powered on. If an SMBALERT is
generated due to the THERM timer limit being exceeded,
another timestamp can be taken. The difference in time can
be calculated for a fixed THERM timer limit time. For
example, if it takes one week for a THERM timer limit of
2.914 seconds to be exceeded and the next time it takes only
one hour, this is an indication of a serious degradation in
system performance.
Alternatively, OS− or BIOS−level software can timestamp
3. Select whether THERM timer events should
4. Select a suitable THERM limit value. This value
5. Select a THERM monitoring time. This value
cooling. If this bit is 0, the fans run at their current
settings and are not affected by THERM events. If
the fans are not already running when THERM is
asserted, the fans do not run at full speed.
generate SMBALERT interrupts. Bit 5 (F4P) of
Interrupt Mask Register 2 (0x75), when set, masks
out the SMBALERT when the THERM timer limit
value is exceeded. This bit should be cleared if
SMBALERTis based on THERM events required.
determines whether an SMBALERT is generated on
the first THERM assertion, or only if a cumulative
THERM assertion time limit is exceeded. A value of
0x00 causes an SMBALERT to be generated on the
first THERM assertion.
specifies how often OS or BIOS level software
checks the THERM timer. For example, BIOS
could read the THERM timer once an hour to
determine the cumulative THERM assertion time.
If, for example, the total THERM assertion time is
<22.76 ms in Hour 1, >182.08 ms in Hour 2, and
>5.825 sec in Hour 3, this can indicate that system
performance is degrading significantly because
THERM is asserting more frequently on an hourly
basis.

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