NCP5314FTR2 ON Semiconductor, NCP5314FTR2 Datasheet

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NCP5314FTR2

Manufacturer Part Number
NCP5314FTR2
Description
IC CTRLR BUCK CPU 2/3/4PH 32LQFP
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCP5314FTR2

Applications
Controller, CPU
Voltage - Input
9.5 ~ 13.2 V
Number Of Outputs
4
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Voltage - Output
-
Other names
NCP5314FTR2OSTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NCP5314FTR2
Manufacturer:
ON Semiconductor
Quantity:
10 000
Part Number:
NCP5314FTR2G
Manufacturer:
ON Semiconductor
Quantity:
10 000
NCP5314
Two/Three/Four−Phase
Buck CPU Controller
latest high−performance CPUs. The IC can be programmed as a two−,
three− or four−phase buck controller, and the per−phase switching
frequency can be as high as 1.2 MHz. Combined with external gate
drivers and power components, the controller implements a compact,
highly integrated multi−phase buck converter.
both line and load, and achieves current sharing between phases. This
control scheme provides the industry’s fastest transient response,
reducing the need for large banks of output capacitors and higher
switching frequency.
functions and protection features.
Features
January, 2007 − Rev. 10
The NCP5314 provides full−featured and flexible control for the
Enhanced V
The controller meets VR(M)10.x specifications with all the required
Switching Regulator Controller
Current Sharing
Protection Features
System Power Management
Pb−Free Package is Available
Semiconductor Components Industries, LLC, 2007
Capacitor Requirements
Specification
Programmable 2/3/4 Phase Operation
Lossless Current Sensing
Enhanced V
Programmable Up to 1.2 MHz Switching Frequency Per Phase
0 to 100% Adjustment of Duty Cycle
Programmable Adaptive Voltage Positioning Reduces Output
Programmable Soft−Start
Differential Current Sense Pins for Each Phase
Current Sharing Within 10% Between Phases
Programmable Pulse−by−Pulse Current Limit for Each Phase
“111110” and “111111” DAC Code Fault
Latching Off Overvoltage Protection
Programmable Latching Overcurrent Protection
Undervoltage Lockout
External Enable Control
Three−State MOSFET Driver Control through Driver−On Signal
6−Bit DAC with 0.5% Tolerance Compatible with VR(M)10.x
Programmable Lower Power Good Threshold
Power Good Output
2
2
control inherently compensates for variations in
Control Method Provides Fast Transient Response
1
NCP5314MNR2
NCP5314FTR2
NCP5314FTR2G
†For information on tape and reel specifications,
PWRGD
DRVON
PWRLS
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
V
(Bottom View)
V
V
V
Device
FTB SUFFIX
FFB
CASE 873A
32 PIN QFN
MN SUFFIX
CASE 485J
ID2
ID3
ID4
SS
LQFP−32
ORDERING INFORMATION
A
WL
YY
WW
G
1
2
3
4
5
6
7
8
32 31 30 29 28 27 26 25
PIN CONNECTIONS
9 10 11 12 13 14 15 16
http://onsemi.com
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
32 Pin QFN
(Pb−Free)
LQFP−32
LQFP−32
Package
MARKING DIAGRAMS
Publication Order Number:
32
1
1
AWLYYWWG
32
AWLYYWW
NCP5314
2500 Tape & Reel
2000 Tape & Reel
2000 Tape & Reel
NCP5314
24
23
22
21
20
19
18
17
Shipping
NCP5314/D
I
R
V
GATE1
GATE2
GATE3
GATE4
GND
LIM
CC
OSC

Related parts for NCP5314FTR2

NCP5314FTR2 Summary of contents

Page 1

... PWRGD 7 DRVON ORDERING INFORMATION Device Package NCP5314MNR2 32 Pin QFN NCP5314FTR2 LQFP−32 NCP5314FTR2G LQFP−32 (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/ NCP5314 AWLYYWW NCP5314 ...

Page 2

NCP5314 OSC2 R OSC1 R CS1P 25 CS1N 26 CS2P 27 CS2N 28 ENABLE 29 ID5 V 30 ID0 V 31 ID1 V 32 Figure 1. Application Diagram 0.8 V − 1.6 V, Four−Phase Converter http://onsemi.com CS3P ...

Page 3

MAXIMUM RATINGS Operating Junction Temperature Lead Temperature Soldering, Reflow (Note 1) Storage Temperature Range ESD Susceptibility: Human Body Model JEDEC Moisture Sensitivity Level (MSL): LQFP Package Thermal Resistance Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings ...

Page 4

ELECTRICAL CHARACTERISTICS V(I SS VCC ROSC VOLTAGE IDENTIFICATION (VID) Voltage Identification DAC (0 = Connected to GND Open or Pull−Up to Internal 3 ...

Page 5

ELECTRICAL CHARACTERISTICS V(I SS VCC ROSC VOLTAGE IDENTIFICATION (VID) (CONTINUED) Voltage Identification DAC (0 = Connected to GND Open or Pull−Up to Internal 3.3 V ...

Page 6

ELECTRICAL CHARACTERISTICS V(I SS VCC ROSC Characteristic VID Inputs Input Threshold VID Pin Current SGND Bias Current SGND Voltage Compliance Range Power Good Upper Threshold, Offset from ...

Page 7

ELECTRICAL CHARACTERISTICS (continued V(I SS VCC ROSC Characteristic GATES High Voltage Low Voltage Rise Time GATE Fall Time GATE Oscillator Switching Frequency R Voltage OSC Phase Delay, ...

Page 8

PIN DESCRIPTION Pin No. Pin Symbol Á Á Á Á Á Á Á Á Á Á Á Á Á Á Á Á Á 1−3, V −V DAC VID Inputs ID0 ID5 Á Á Á Á Á Á Á Á Á ...

Page 9

Dominant Dominant RESET RESET Dominant Dominant SET SET Figure 2. Block Diagram http://onsemi.com NCP5314 Dominant Dominant RESET RESET 9 Oscillator ...

Page 10

TYPICAL PERFORMANCE CHARACTERISTICS 0.5 0.4 0.3 0.2 0.1 VID = 010100 0 −0.1 VID = 010101 −0.2 −0.3 −0.4 −0 TEMPERATURE ( C) Figure 3. DAC Variation versus Temperature 230 220 210 200 190 0 20 ...

Page 11

TYPICAL PERFORMANCE CHARACTERISTICS 1.025 1.020 1.015 1.010 1.005 1.000 TEMPERATURE ( C) Figure 9. V versus Temperature ROSC TEMPERATURE ( C) Figure 11. Soft−Start ...

Page 12

TYPICAL PERFORMANCE CHARACTERISTICS Enable V Fault REF UVLO Fault Fault Reset Fault Latch Fault DRVON SS COMP V OUT I OUT PWRGD NCP5314 100 ...

Page 13

... Overview The NCP5314 DC/DC controller from ON Semiconductor 2 was developed using the Enhanced combines the original V topology with peak current−mode control for fast transient response and current sensing capability. The addition of an internal PWM ramp and implementation of fast−feedback directly from Vcore has improved transient response and simplified design. This controller can be adjusted to operate as a two− ...

Page 14

Enhanced V responds to disturbances in V employing both “slow” and “fast” voltage regulation. The internal error amplifier performs the slow regulation. Depending on the ...

Page 15

COMP pin would move higher to restore the output voltage to the original level. Inductive Current Sensing For lossless sensing, current can be measured across the inductor as shown in Figure 19. In the diagram ...

Page 16

Figure 20. Inductive Sensing Waveform During a Load Step with Fast RC Time Constant (50 s/div) The waveforms in Figure 20 show a simulation of the current sense signal and the actual inductor current during a positive step in load ...

Page 17

Since the internally−set thresholds for PWRLS are VID/2 for the lower threshold and VID + 80 mV for the upper threshold, a simple equation can be provided to assist the designer in selecting a resistor divider to provide the desired ...

Page 18

The phase firing order will become 1−2−3. Two− and single−phase operation may be realized as well. First, the designer must choose the proper phases. Two phase operation must use phase 2 and ...

Page 19

Output Inductor Selection The output inductor may be the most critical component in the converter because it will directly effect the choice of other components and dictate both the steady−state and transient performance of the converter. When selecting an ...

Page 20

C,IN C,MAX I C,MAX I C,MIN FET Off, Caps Charging −I IN,AVG FET On, Caps Discharging Figure 24. Input Capacitor Current for a Four−Phase Converter I is the peak−to−peak ripple current in the ...

Page 21

The input inductance value calculated from Equation 18 is relatively conservative. It assumes the supply voltage is very “stiff” and does not account for any parasitic elements that will limit dI/dt such as stray inductance. Also, the ESR values of ...

Page 22

I is the RMS value of the trapezoidal current in RMS,CNTL the control MOSFET: I RMS,CNTL + D @ [(I Lo,MAX Lo,MAX @ I Lo,MIN ) I Lo,MIN the maximum ...

Page 23

As load current increases, the voltage at the V pin rises. The ratio of the R DRP DRP causes the voltage at the V pin to rise, reducing the output FB voltage. Figure 29 shows the ...

Page 24

Spec Max −0.04 −0.06 −0.08 Spec Min −0.10 −0.12 −0. (A) OUT Figure 29. The DC Effects of AVP vs. Load It is easiest to select a value for R FB equation to ...

Page 25

Error Amplifier Tuning After the steady−state (static) AVP has been set and the current sense network has been optimized, the Error Amplifier must be tuned. The gain of the Error Amplifier should be adjusted to provide an acceptable transient ...

Page 26

Current Limit Setting When the output of the current sense amplifier (COx in the block diagram) exceeds the voltage on the I will latch off. For inductive sensing, the I should be set based on the inductor’s maximum resistance ...

Page 27

D PIN 1 LOCATION 2X 0. 0.15 C TOP VIEW 0. SIDE VIEW 32X 32X NOTE 3 0. 0.05 C BOTTOM ...

Page 28

−T− DETAIL −Z− −AB− SEATING −AC− PLANE 0.10 (0.004) AC NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE ...

Page 29

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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