NCP5314FTR2 ON Semiconductor, NCP5314FTR2 Datasheet - Page 22

• Manufacturer Part Number: NCP5314FTR2
• Description: IC CTRLR BUCK CPU 2/3/4PH 32LQFP
• Manufacturer: ON Semiconductor

Specifications of NCP5314FTR2

• Applications: Controller, CPU
• Voltage - Input: 9.5 ~ 13.2 V
• Number Of Outputs: 4
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Voltage - Output: -
• Other names: NCP5314FTR2OSTR

the control MOSFET:
I RMS,CNTL + D
inductor of value L
applied gate drive voltage.
gate−to−source charge plus the gate−to−drain charge. This
may be specified in the data sheet or approximated from the
gate−charge curve as shown in the Figure 26.
dissipation can be approximated from:
where:
the MOSFET is ON and the second term represents the diode
losses that occur during the gate non−overlap time.
control MOSFET with the exception of:
I RMS,SYNCH + 1 * D
P D,SYNCH + (I RMS,SYNCH 2 @ R DS(on) )
I
I
I
I
D is the duty cycle of the converter:
R
Q
I
V
f
Q
V
Q
Q
For the lower or synchronous MOSFET, the power
Vf
t_nonoverlap is the non−overlap time between the upper
The first term represents the conduction or IR losses when
All terms were defined in the previous discussion for the
RMS,CNTL
Lo,MAX
Lo,MIN
O,MAX
g
sw
@ [(I Lo,MAX 2 ) I Lo,MAX @ I Lo,MIN ) I Lo,MIN 2 ) 3] 1 2
@ [(I Lo,MAX 2 ) I Lo,MAX @ I Lo,MIN ) I Lo,MIN 2 ) 3] 1 2
I
DS(on)
switch
IN
G
g
RR
oss
Lo
commonly specified in the data sheet.
sheet.
diode at the converter output current.
and lower gate drivers to prevent cross conduction.
This time is usually specified in the data sheet for the
control IC.
is the output current from the gate driver IC.
diode
is the gate drive voltage.
is the switching frequency of the converter.
is the MOSFET total gate charge to obtain R
) (Vf diode @ I O,MAX 2 @ t_nonoverlap @ f SW )
is the input voltage to the converter.
is the reverse recovery charge of the lower MOSFET.
is the MOSFET output charge specified in the data
is the peak−to−peak ripple current in the output
DI Lo + (V IN * V OUT ) @ D (Lo @ f SW )
is the forward voltage of the MOSFET’s intrinsic
is the minimum output inductor current:
is the maximum converter output current.
is the ON resistance of the MOSFET at the
is the maximum output inductor current:
is the post gate threshold portion of the
I Lo,MAX + I O,MAX f ) DI Lo 2
I Lo,MIN + I O,MAX f * DI Lo 2
is the RMS value of the trapezoidal current in
Q switch + Q gs2 ) Q gd
o
:
D + V OUT V IN
http://onsemi.com
DS(on)
(20)
(21)
(22)
(23)
(24)
(25)
(26)
(27)
NCP5314
;
22
designer can calculate the required thermal impedance to
maintain a specified junction temperature at the worst case
ambient operating temperature.
where:
copper clad circuit boards will have approximate thermal
resistances (
should be performed to insure the design will dissipate the
required power under worst case operating conditions.
Variables considered during testing should include
maximum ambient temperature, minimum airflow,
maximum input voltage, maximum loading and component
variations (i.e., worst case MOSFET R
inductors and capacitors share the MOSFET’s heatsinks and
will add heat and raise the temperature of the circuit board
and MOSFET. For any new design, it is advisable to have as
much heatsink area as possible. All too often, new designs are
found to be too hot and require re−design to add heatsinking.
7. Adaptive Voltage Positioning
(AVP): R
divider, shown in Figures 27 and 28, between V
and V
of the controller. At no load, this resistor will conduct the
very small internal bias current of the V
V
error due to the input bias current. If the R
small, the V
pins of the controller. At no load, these pins should be at an
equal potential, and no current should flow through R
reality, the bias current coming out of the V
to have a small positive voltage with respect to V
current produces a small decrease in output voltage at no
load, which can be minimized by keeping the R
FB
When the MOSFET power dissipations are known, the
T
T
For TO−220 and TO−263 packages, standard FR−4
As with any power design, proper laboratory testing
Two resistors program the Adaptive Voltage Positioning
Resistor R
Resistor R
T
JC
SA
A
J
MOSFET;
heatsink assuming direct mounting of the MOSFET (no
thermal “pad” is used);
is the specified maximum allowed junction temperature;
should be kept below 10 k
is the total thermal impedance (
is the worst case ambient operating temperature.
Pad Size (in
OUT
is the junction−to−case thermal impedance of the
is the sink−to−ambient thermal impedance of the
FB
.
0.50/323
0.75/484
1.00/645
1.50/968
FB
FB
and R
DRP
SA
bias current can be ignored.
is connected between V
) as shown below:
2
is connected between the V
/mm
DRP
q T t (T J * T A ) P D
2
. These components form a resistor
)
to avoid output voltage
Single−Sided
JC
1 oz Copper
OUT
60−65 C/W
55−60 C/W
50−55 C/W
45−50 C/W
DS(on)
+
FB
FB
DRP
and the V
pin. Therefore
SA
resistor is kept
DRP
). Also, the
);
DRP
pin is likely
DRP
and V
FB
resistor
DRP
, V
FB
. This
(28)
. In
FB
pin
FB
,