NCP5314FTR2 ON Semiconductor, NCP5314FTR2 Datasheet - Page 25

• Manufacturer Part Number: NCP5314FTR2
• Description: IC CTRLR BUCK CPU 2/3/4PH 32LQFP
• Manufacturer: ON Semiconductor

Specifications of NCP5314FTR2

• Applications: Controller, CPU
• Voltage - Input: 9.5 ~ 13.2 V
• Number Of Outputs: 4
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Voltage - Output: -
• Other names: NCP5314FTR2OSTR

9. Error Amplifier Tuning
current sense network has been optimized, the Error
Amplifier must be tuned. The gain of the Error Amplifier
should be adjusted to provide an acceptable transient
response by increasing or decreasing the Error Amplifier’s
feedback capacitor (C
The bandwidth of the control loop will vary directly with the
gain of the error amplifier.
the COMP pin will slew too slowly and the output voltage
will overshoot as shown in Figure 33. On the other hand, if
C
COMP pin will slew very quickly and overshoot will occur.
Integrator “wind up” is the cause of the overshoot. In this
AMP
After the steady−state (static) AVP has been set and the
If C
Overshoot and Monotonically Settles to Its Final Value.
Figure 35. The Value of C
Loop Gain/Bandwidth Too Low. COMP Slews Too
Figure 33. The Value of C
Quickly Without Spiking or Ringing. V
Slowly Which Results in Overshoot in V
AMP
is too small, the loop gain/bandwidth will be high, the
is too large, the loop gain/bandwidth will be low,
AMP
in the Applications Diagram).
AMP
AMP
Is Optimal. COMP Slews
Is Too High and the
OUT
Does Not
OUT
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NCP5314
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case, the output voltage will transition more slowly because
COMP spikes upward as shown in Figure 34. Too much loop
gain/bandwidth increases the risk of instability. In general,
one should use the lowest loop gain/bandwidth possible to
achieve acceptable transient response. This will insure good
stability. If C
quickly but not overshoot and the output voltage will
monotonically settle as shown in Figure 35.
transient response, the steady−state voltage ripple on the
COMP pin should be examined. When the converter is
operating at full steady−state load, the peak−to−peak voltage
ripple (V
as shown in Figure 36. Less than 10 mV
ripple on the COMP pin will contribute to jitter.
Voltage Ripple Will Contribute to Output Voltage Jitter.
Quickly, Which Is Evident from the Small Spike in Its
Voltage When the Load Is Applied or Removed. The
Output Voltage Transitions More Slowly Because of
Ripple on the COMP Pin Should Be Less than 20 mV
After the control loop is tuned to provide an acceptable
Loop Gain/Bandwidth Too High. COMP Moves Too
Figure 36. At Full−Load the Peak−to−Peak Voltage
Figure 34. The Value of C
for a Well−Tuned/Stable Controller. Higher COMP
PP
) on the COMP pin should be less than 20 mV
AMP
is optimal, the COMP pin will slew
the COMP Spike.
AMP
Is Too Low and the
PP
is ideal. Excessive
PP