LTC3601EUD#PBF Linear Technology, LTC3601EUD#PBF Datasheet - Page 16

• Manufacturer Part Number: LTC3601EUD#PBF
• Description: IC REG BUCK 1.5A ADJ 16QFN
• Manufacturer: Linear Technology
• Type: Step-Down (Buck)r

Specifications of LTC3601EUD#PBF

• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 0.5 ~ 14.52 V
• Current - Output: 1.5A
• Frequency - Switching: 800kHz ~ 4MHz
• Voltage - Input: 4 ~ 15 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-WQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power - Output: -

LTC3601
APPLICATIONS INFORMATION
2. The internal LDO supplies the power to the INTV
3. Other “hidden” losses such as transition loss, cop-
16
The R
obtained from the Typical Performance Characteristics
curves. Thus to obtain I
The total power loss here is the sum of the switching
losses and quiescent current losses from the control
circuitry.
Each time a power MOSFET gate is switched from low
to high to low again, a packet of charge dQ moves
from V
out of INTV
control bias current. In continuous mode, I
= f(Q
of the internal top and bottom power MOSFETs and f
is the switching frequency. For estimation purposes,
(Q
To calculate the total power loss from the LDO load,
simply add the gate charge current and quiescent cur-
rent and multiply by V
per trace resistances, and internal load currents can
account for additional effi ciency degradations in the
overall power system. Transition loss arises from the
brief amount of time the top power MOSFET spends in
the saturated region during switch node transitions. The
LTC3601 internal power devices switch quickly enough
that these losses are not signifi cant compared to other
sources.
Other losses, including diode conduction losses during
dead time and inductor core losses, generally account
for less than 2% total additional loss.
T
“I
P
+ Q
LDO
2
T
R LOSS” = I
DS(ON)
+ Q
IN
B
= (I
) on the LTC3601 is approximately 1nC.
to ground. The resulting dQ/dt is a current
B
CC
GATECHG
for both the top and bottom MOSFETs can be
), where Q
that is typically much larger than the DC
OUT
+ I
2
IN
· (R
T
Q
2
:
) • V
and Q
R loss:
SW
IN
+ R
B
are the gate charges
L
)
GATECHG
CC
rail.
Thermal Considerations
The LTC3601 requires the exposed package backplane
metal (PGND pin on the QFN, SGND pin on the MSOP
package) to be well soldered to the PC board to provide
good thermal contact. This gives the QFN and MSOP
packages exceptional thermal properties, compared to
other packages of similar size, making it diffi cult in normal
operation to exceed the maximum junction temperature
of the part. In many applications, the LTC3601 does not
dissipate much heat due to its high effi ciency and low
thermal resistance package backplane. However, in applica-
tions in which the LTC3601 is running at a high ambient
temperature, high input voltage, high switching frequency,
and maximum output current, the heat dissipated may
exceed the maximum junction temperature of the part. If
the junction temperature reaches approximately 150°C,
both power switches will be turned off until temperature
decreases approximately 10°C.
Thermal analysis should always be performed by the user
to ensure the LTC3601 does not exceed the maximum
junction temperature.
The temperature rise is given by:
where P
is the thermal resistance from the junction of the die to
the ambient temperature.
Consider the example in which an LTC3601EUD is operat-
ing with I
and an ambient temperature of 70°C. From the Typical
Performance Characteristics section the R
switch is found to be nominally 130mΩ while that of the
bottom switch is nominally 100mΩ yielding an equivalent
power MOSFET resistance R
R
DS(ON)
T
RISE
TOP • 1.8/12 + R
D
= P
OUT
is the power dissipated by the regulator and θ
D
θ
= 1.5A, V
JA
IN
DS(ON)
= 12V, f = 4MHz, V
SW
BOT • 10.2/12 = 105mΩ.
of:
DS(ON)
OUT
of the top
= 1.8V,
3601fa
JA