MAX8566ETJ+ Maxim Integrated Products, MAX8566ETJ+ Datasheet - Page 11

IC REG STP DWN 10A 32-TQFN

MAX8566ETJ+

Manufacturer Part Number
MAX8566ETJ+
Description
IC REG STP DWN 10A 32-TQFN
Manufacturer
Maxim Integrated Products
Type
Step-Down (Buck)r
Datasheet

Specifications of MAX8566ETJ+

Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
0.6 ~ 3.1 V
Current - Output
10A
Frequency - Switching
250kHz ~ 4.2MHz
Voltage - Input
2.3 ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-TQFN Exposed Pad
Power - Output
2.67W
Output Voltage
0.5 V
Input Voltage
2.3 V to 3.6 V
Switching Frequency
2 MHz
Operating Temperature Range
- 40 C to + 85 C
Mounting Style
SMD/SMT
Duty Cycle (max)
95 %
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
13–17
18–22
5–12
PIN
23
24
25
26
27
28
29
30
31
32
1
2
3
4
SYNCOUT
PWRGD
NAME
MODE
COMP
PGND
REFIN
SYNC
FREQ
GND
BST
LSS
V
EN
FB
LX
SS
EP
______________________________________________________________________________________
IN
DD
Internal-Switch Step-Down Regulator
Monotonic Startup Enable/Disable. Connect MODE to GND or to the center tap of an external
resistor-divider to enable/disable monotonic startup mode.
Error-Amplifier Output. Connect the necessary compensation network from COMP to FB. COMP is
internally pulled to GND when the IC is in shutdown mode.
Power-Good Output. Open-drain output that is high impedance when V
PWRGD is internally pulled low. PWRGD is internally pulled low when the IC is in shutdown mode,
V
High-Side MOSFET Driver Supply. Bypass BST to LX with a 0.1µF capacitor. BST is connected to
LSS through an internal pMOS switch.
Inductor Connection. All LX pins are internally connected together. Connect all LX pins to the
switched side of the inductor. LX is high impedance when the IC is in shutdown mode.
Power Ground. All PGND pins are internally connected. Connect all PGND pins externally to the
power ground plane.
Input Power Supply. All IN pins are internally connected. Connect all IN pins externally to an input
supply from 2.3V to 3.6V. Bypass IN to PGND with 20µF of ceramic capacitance.
Low-Side MOSFET-Driver Supply Voltage. Connect LSS to a 2.3V to 3.6V supply voltage.
IC Supply Voltage Input. Connect V
with a 4.7µF capacitor.
External Reference Input. Connect to an external reference. FB regulates to the voltage at REFIN.
Connect REFIN to SS to use the internal reference.
Soft-Start Input. Connect a capacitor from SS to GND to set the soft-start time. See the Soft-Start and
REFIN section.
Enable Input. Active-high logic input to enable/disable the MAX8566. Connect EN to IN to enable
the IC. Connect EN to GND to disable the IC.
Synchronization Input. Synchronize to an external clock with a frequency of 250kHz to 2.4MHz.
Leave SYNC unconnected to disable the synchronization function.
Oscillator Frequency Selection. Connect a resistor from FREQ to GND to select the switching
frequency. See the Frequency Select (FREQ) section.
Oscillator Output. The SYNCOUT output is 180° out-of-phase from the internal oscillator or the
SYNC signal to facilitate running a second regulator 180° out-of-phase with the first to reduce input
ripple current.
Analog Circuit Ground
Feedback Input. Connect FB to the center tap of an external resistor-divider from the output to GND
to set the output voltage.
Exposed Pad. Internally connected to GND. Connect to a large ground plane to maximize thermal
performance. Not indented as an electrical connection point.
DD
is below the UVLO threshold, or the IC is in thermal shutdown.
High-Efficiency, 10A, PWM
DD
to IN through an external 2 resistor. Bypass V
FUNCTION
FB
Pin Description
90% of 0.6V. Otherwise,
DD
to GND
11

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