KSZ8695PX Micrel Inc, KSZ8695PX Datasheet - Page 25

• Manufacturer Part Number: KSZ8695PX
• Description: IC SWITCH 10/100 1PORT 289PBGA
• Manufacturer: Micrel Inc

Specifications of KSZ8695PX

• Applications: *
• Mounting Type: Surface Mount
• Package / Case: 289-PBGA
• Operating Supply Voltage (typ): 1.8V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 289
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: KSZ8695PX-EVAL - EVAL KIT EXPERIMENT ONLY KSZ8695
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant
• Other names: 576-1024

KS8695PX
UART Pins
General Purpose I/O Pins
Note:
1. I = Input.
M9999-091605
O = Output.
I/O = Bidirectional.
O/I = Output in normal mode; input pin during reset.
M16
M16
M16
M16
M16
M15
M15
M15
M15
M15
M14
M14
M14
M14
M14
G17
G17
G17
G17
G17
G16
G16
G16
G16
G16
N16
N16
N16
N16
N16
N14
N14
N14
N14
N14
N15
N15
N15
N15
N15
H17
H17
H17
H17
H17
H16
H16
H16
H16
H16
H15
H15
H15
H15
H15
H14
H14
H14
H14
H14
K17
K17
K17
K17
K17
K16
K16
K16
K16
K16
K15
K15
K15
K15
K15
K14
K14
K14
K14
K14
L15
L15
L15
L15
L15
L14
L14
L14
L14
L14
J17
J17
J17
J17
J17
J16
J16
J16
J16
J16
J15
J15
J15
J15
J15
J14
J14
J14
J14
J14
L17
L17
L17
L17
L17
L16
L16
L16
L16
L16
Pin
Pin
Pin
Pin
Pin
Pin
A3
A3
A3
A3
A3
CPUCLKSEL
CPUCLKSEL
CPUCLKSEL
CPUCLKSEL
CPUCLKSEL
DBGENN
DBGENN
DBGENN
DBGENN
DBGENN
SCANEN
SCANEN
SCANEN
UDCDN/
UDCDN/
UDCDN/
UDCDN/
UDCDN/
TSTRST
TSTRST
TSTRST
UDTRN/
UDTRN/
UDTRN/
UDTRN/
UDTRN/
URTSN/
URTSN/
URTSN/
URTSN/
URTSN/
UCTSN/
UCTSN/
UCTSN/
UCTSN/
UCTSN/
UDSRN
UDSRN
UDSRN
UDSRN
UDSRN
BISTEN
BISTEN
BISTEN
GPIO10
GPIO10
GPIO10
GPIO10
GPIO10
GPIO11
GPIO11
GPIO11
GPIO11
GPIO11
GPIO12
GPIO12
GPIO12
GPIO12
GPIO12
GPIO13
GPIO13
GPIO13
GPIO13
GPIO13
GPIO14
GPIO14
GPIO14
GPIO14
GPIO14
GPIO15
GPIO15
GPIO15
GPIO15
GPIO15
PRSTN
PRSTN
PRSTN
PRSTN
PRSTN
GPIO0/
GPIO0/
GPIO0/
GPIO0/
GPIO0/
GPIO1/
GPIO1/
GPIO1/
GPIO1/
GPIO1/
GPIO2/
GPIO2/
GPIO2/
GPIO2/
GPIO2/
GPIO3/
GPIO3/
GPIO3/
GPIO3/
GPIO3/
GPIO4/
GPIO4/
GPIO4/
GPIO4/
GPIO4/
TOUT0
TOUT0
TOUT0
GPIO5/
GPIO5/
GPIO5/
GPIO5/
GPIO5/
TOUT1
TOUT1
TOUT1
GPIO6
GPIO6
GPIO6
GPIO6
GPIO6
GPIO7
GPIO7
GPIO7
GPIO7
GPIO7
GPIO8
GPIO8
GPIO8
GPIO8
GPIO8
GPIO9
GPIO9
GPIO9
GPIO9
GPIO9
Name
Name
Name
URXD
URXD
URXD
URXD
URXD
UTXD
UTXD
UTXD
UTXD
UTXD
URIN/
URIN/
URIN/
URIN/
URIN/
Name
Name
Name
EINT0
EINT0
EINT0
EINT1
EINT1
EINT1
EINT1
EINT2
EINT2
EINT2
EINT3
EINT3
EINT3
I/O Type
I/O Type
I/O Type
I/O Type
I/O Type
I/O Type
O/I
O/I
O/I
O/I
O/I
O/I
O/I
O/I
O/I
O/I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
(1)
(1)
Description
Description
UART receive data.
UART receive data.
UART receive data.
UART receive data.
UART receive data.
UART transmit data.
UART transmit data.
UART transmit data.
UART transmit data.
UART transmit data.
UART data terminal ready. Active low.
UART data terminal ready. Active low.
UART data terminal ready. Active low.
UART data terminal ready. Active low.
UART data terminal ready. Active low.
DBGENN = 0 (factory reserved test signal)
DBGENN = 0 (factory reserved test signal)
DBGENN = 0 (factory reserved test signal)
DBGENN = 0 (factory reserved test signal)
DBGENN = 0 (factory reserved test signal)
UART data set ready. Active low.
UART data set ready. Active low.
UART data set ready. Active low.
UART data set ready. Active low.
UART data set ready. Active low.
Normal mode: UART request to send. Active low output.
Normal mode: UART request to send. Active low output.
Normal mode: UART request to send. Active low output.
Normal mode: UART request to send. Active low output.
Normal mode: UART request to send. Active low output.
During reset: CPU clock select. Select CPU clock source. CPUCLKSEL=0 (normal
During reset: CPU clock select. Select CPU clock source. CPUCLKSEL=0 (normal
During reset: CPU clock select. Select CPU clock source. CPUCLKSEL=0 (normal
During reset: CPU clock select. Select CPU clock source. CPUCLKSEL=0 (normal
During reset: CPU clock select. Select CPU clock source. CPUCLKSEL=0 (normal
mode), the internal PLL clock output is used as the CPU clock source.
mode), the internal PLL clock output is used as the CPU clock source.
mode), the internal PLL clock output is used as the CPU clock source.
mode), the internal PLL clock output is used as the CPU clock source.
mode), the internal PLL clock output is used as the CPU clock source.
CPUCLKSEL=1 (factory reserved test signal).
CPUCLKSEL=1 (factory reserved test signal).
CPUCLKSEL=1 (factory reserved test signal).
CPUCLKSEL=1 (factory reserved test signal).
CPUCLKSEL=1 (factory reserved test signal).
UART clear to send. BIST enable (factory reserved test signal).
UART clear to send. BIST enable (factory reserved test signal).
UART clear to send. BIST enable (factory reserved test signal).
UART clear to send. BIST enable (factory reserved test signal).
UART clear to send. BIST enable (factory reserved test signal).
UART data carrier detect. Scan enable (factory reserved test signal).
UART data carrier detect. Scan enable (factory reserved test signal).
UART data carrier detect. Scan enable (factory reserved test signal).
UART data carrier detect. Scan enable (factory reserved test signal).
UART data carrier detect. Scan enable (factory reserved test signal).
UART ring indicator. Chip test reset (factory reserved test signal).
UART ring indicator. Chip test reset (factory reserved test signal).
UART ring indicator. Chip test reset (factory reserved test signal).
UART ring indicator. Chip test reset (factory reserved test signal).
UART ring indicator. Chip test reset (factory reserved test signal).
Description
Description
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. External interrupt request pin.
General purpose I/O pin. Timer 0 output pin.
General purpose I/O pin. Timer 0 output pin.
General purpose I/O pin. Timer 0 output pin.
General purpose I/O pin. Timer 0 output pin.
General purpose I/O pin. Timer 0 output pin.
General purpose I/O pin. Timer 1 output pin.
General purpose I/O pin. Timer 1 output pin.
General purpose I/O pin. Timer 1 output pin.
General purpose I/O pin. Timer 1 output pin.
General purpose I/O pin. Timer 1 output pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
General purpose I/O pin.
PCI Reset. Active low. This signal is an input used to reset the KS8695PX PCI logic. If
PCI Reset. Active low. This signal is an input used to reset the KS8695PX PCI logic. If
PCI Reset. Active low. This signal is an input used to reset the KS8695PX PCI logic. If
PCI Reset. Active low. This signal is an input used to reset the KS8695PX PCI logic. If
PCI Reset. Active low. This signal is an input used to reset the KS8695PX PCI logic. If
the KS8695PX is the host, use the RESETN signal to drive this input. If the
the KS8695PX is the host, use the RESETN signal to drive this input. If the
the KS8695PX is the host, use the RESETN signal to drive this input. If the
the KS8695PX is the host, use the RESETN signal to drive this input. If the
the KS8695PX is the host, use the RESETN signal to drive this input. If the
KS8695PX is a guest, use the system reset to drive this signal.
KS8695PX is a guest, use the system reset to drive this signal.
KS8695PX is a guest, use the system reset to drive this signal.
KS8695PX is a guest, use the system reset to drive this signal.
KS8695PX is a guest, use the system reset to drive this signal.
25
September 2005
Micrel