HCPL-4200 Avago Technologies US Inc., HCPL-4200 Datasheet - Page 7

• Manufacturer Part Number: HCPL-4200
• Description: OPTOCOUPLER RECEIVER 20MA 8-DIP
• Manufacturer: Avago Technologies US Inc.
• Type: Receiverr

Specifications of HCPL-4200

• Mounting Type: Through Hole
• Voltage - Isolation: 3750Vrms
• Input Type: DC
• Voltage - Supply: 4.5 V ~ 20 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• No. Of Channels: 1
• Isolation Voltage: 3.75kV
• Optocoupler Output Type: Logic Gate
• Input Current: 24mA
• Output Voltage: 20V
• Opto Case Style: DIP
• No. Of Pins: 8
• Propagation Delay: 0.23µs
• Output Type: And
• Package Type: 8-Pin DIP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 516-1149-5

Figure 2. Typical Output Voltage vs.
Loop Current.
Notes:
Figure 5. Typical Input Voltage vs.
Temperature.
1.
2. Derate linearly above 70 C free air
3. Derate linearly above 70 C free air
4. Derate linearly above 70 C free air
5. Duration of output short circuit time
6. The device is considered a two
2.8
2.6
2.4
2.2
temperature at a rate of 1.6 mW/ C.
Proper application of the derating
factors will prevent IC junction
temperatures from exceeding 125 C
for ambient temperatures up to 85 C.
temperature at a rate of 3.8 mW/ C.
temperature at a rate of 4.6 mW/ C.
shall not exceed 10 ms.
terminal device, pins 1, 2, 3, and 4
are connected together and pins 5, 6,
7, and 8 are connected together.
-50
1 s pulse width, 300 pps.
T
-25
A
– AMBIENT TEMPERATURE –°C
0
I
I
I
I
= 20 mA
= 12 mA
25
50
75
100
Figure 3. Typical Current Switching
Threshold vs. Temperature.
10. The fall time, t
11. Common mode transient immunity in
Figure 6. Typical Logic Low Output
Voltage vs. Temperature.
7. The t
8. The t
9. The rise time, t
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
10
measured from the 10 mA level on
the leading edge of the input pulse to
the 1.3 V level on the leading edge of
the output pulse.
measured from the 10 mA level on
the trailing edge of the input pulse to
the 1.3 V level on the trailing edge of
the output pulse.
10% to the 90% level on the rising
edge of the output logic pulse.
90% to the 10% level on the falling
edge of the output logic pulse.
the logic high level is the maximum
(negative) dV
edge of the common mode pulse,
8
6
4
2
0
0
-50
-60
PLH
PHL
-40
T
-25
A
– AMBIENT TEMPERATURE –°C
propagation delay is
propagation delay is
-20
T
A
– TEMPERATURE –°C
0
CM
I
HYS
0
f
r
, is measured from the
, is measured from the
/dt on the trailing
25
20
V
I
I
I
O
CC
= 3 mA
40
= 6.4 mA
50
= 4.5 V
60
75
80
100
100
7
Figure 4. Typical Input Loop Voltage
vs. Input Current.
12. Common mode transient immunity in
13. Use of a 0.1 F bypass capacitor
14. In accordance with UL 1577, each
Figure 7. Typical Logic High Output
Current vs. Temperature.
-1
-2
-3
-4
-5
-6
-7
-8
V
output voltage in the logic high state
(i.e., V
the logic low level is the maximum
(positive) dV
edge of the common mode pulse,
V
output voltage in the logic low state
(i.e., V
connected between pins 5 and 8 is
recommended.
optocoupler momentary withstand is
proof tested by applying an insulation
test voltage
second (leakage detection current
limit, I
0
-60
CM
CM
V
V
O
O
, which can be sustained with the
, which can be sustained with the
= 2.7 V
= 2.4 V
-40
O
O
i-o
-20
T
A
2 V).
0.8 V).
– TEMPERATURE –°C
5 A).
CM
0
4500 V rms for 1
/dt on the leading
20
V
I
I
CC
= 12 mA
40
= 4.5 V
60
80
100