MT18HTF25672FY-667A5E3 Micron Technology Inc, MT18HTF25672FY-667A5E3 Datasheet

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MT18HTF25672FY-667A5E3

Manufacturer Part Number
MT18HTF25672FY-667A5E3
Description
MODULE DDR2 2GB 240FBDIMM
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT18HTF25672FY-667A5E3

Memory Type
DDR2 SDRAM
Memory Size
2GB
Speed
667MT/s
Package / Case
240-FBDIMM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 1:
DDR2 SDRAM FBDIMM
MT18HTF12872F – 1GB
MT18HTF25672F – 2GB
For the latest data sheets and technical notes, refer to Micron’s Web site:
Features
• 240-pin, DDR2 fully buffered dual in-line memory
• Fast data transfer rates: PC2-4200, PC2-5300, and
• 1GB (128 Meg x 72), 2GB (256 Meg x 72)
• 3.2 Gb/s, 4.0 Gb/s, and 4.8 Gb/s link transfer rates
• High-speed, differential, point-to-point link
• Fault-tolerant; can work around a bad bit lane in
• High-density scaling with up to eight FBDIMMs per
• SMBus interface to AMB for configuration register
• In-band and out-of-band command access
• Deterministic protocol
• Automatic DDR2 SDRAM bus and channel
• Transmitter de-emphasis to reduce ISI
• MBIST and IBIST test functions
• Transparent mode for DRAM test support
• V
• V
• V
• V
• Serial presence-detect (SPD) with EEPROM
• Gold edge contacts
• Single rank
pdf: 09005aef81a2f214/source: 09005aef81a2f22d
HTF18C64_128_256x72F.fm - Rev. B 9/07 EN
Speed
module (FBDIMM)
PC2-6400
between host controller and advanced memory
buffer (AMB)
each direction
channel
access
– Enables memory controller optimization of DRAM
– Delivers precise control and repeatable memory
calibration
termination
Grade
-80E
-667
-53E
REF
DD
CC
DDSPD
accesses for maximum performance
behavior
= 1.5V for AMB
= V
= 0.9V SDRAM command and address
DD
= +3.0V to +3.6V for AMB and EEPROM
Q = +1.8V for DDR2 SDRAM
Key Timing Parameters
Industry Nomenclature
Products and specifications discussed herein are subject to change by Micron without notice.
PC2-6400
PC2-5300
PC2-4200
CL = 5
800
667
1GB, 2GB (x72, SR) 240-Pin DDR2 SDRAM FBDIMM
Data Rate (MT/s)
1
CL = 4
Figure 1:
Notes: 1. Not recommended for new designs.
Options
• Package
• Frequency/CAS latency
533
533
533
PCB height: 30.35mm (1.19in)
– 240-pin DIMM (Pb-free)
– 2.5ns @ CL = 5 (DDR2-800)
– 3.0ns @ CL = 5 (DDR2-667)
– 3.75ns @ CL = 4 (DDR2-533)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
www.micron.com
CL = 3
400
400
240-Pin FBDIMM (MO-256 R/C C)
t
(ns)
12.5
RCD
15
15
©2005 Micron Technology, Inc. All rights reserved.
1
(ns)
12.5
t
15
15
RP
Marking
Features
-80E
-667
-53E
Y
(ns)
t
55
55
55
RC

Related parts for MT18HTF25672FY-667A5E3

MT18HTF25672FY-667A5E3 Summary of contents

Page 1

DDR2 SDRAM FBDIMM MT18HTF12872F – 1GB MT18HTF25672F – 2GB For the latest data sheets and technical notes, refer to Micron’s Web site: Features • 240-pin, DDR2 fully buffered dual in-line memory module (FBDIMM) • Fast data transfer rates: PC2-4200, PC2-5300, ...

Page 2

... Data sheets for the base devices can be found on Micron’s Web site. 2. All part numbers end with a four-place code (not shown) that designates component, PCB, and AMB revisions. Consult factory for current revision codes. Example: MT18HTF25672FY-667E1D4. pdf: 09005aef81a2f214/source: 09005aef81a2f22d HTF18C64_128_256x72F.fm - Rev. B 9/07 EN ...

Page 3

Pin Assignments and Descriptions Table 5: Pin Assignments 240-Pin FBDIMM Front Pin Symbol Pin Symbol Pin Symbol Pin Symbol PN3 PN3 ...

Page 4

Table 6: Pin Descriptions Symbol Type Description PS0–PS9 Input Primary southbound data, positive lines. PS0#–PS9# Input Primary southbound data, negative lines. SCL Input Serial presence-detect (SPD) clock input. SCK Input System clock input, positive line. SCK# Input System clock Input, ...

Page 5

... Micron Technology, Inc., reserves the right to change products or specifications without notice. 5 Block Diagrams Commodity DDR2 DDR2 SDRAM component devices DDR2 component DDR2 component DDR2 component Up to eight modules AMB • • • DDR2 component DDR2 component DDR2 component DDR2 component SMBus access to buffer registers ©2005 Micron Technology, Inc. All rights reserved. ...

Page 6

Functional Block Diagram Figure 3: Functional Block Diagram V SS CS0# DQS0 DQS0# DQ0 DQ1 DQ2 DQ3 DQS9 DQS9# DQ4 DQ5 DQ6 DQ7 DQS1 DQS1# DQ8 DQ9 DQ10 DQ11 DQS10 DQS10# DQ12 DQ13 DQ14 DQ15 DQS2 DQS2# DQ16 DQ17 DQ18 ...

Page 7

... Serial Presence-Detect (SPD) for Fully Buffered DIMM – JEDEC Standard No. 21-C page 4.1.2.7-1 The MT18HTF12872F and MT18HTF25672F DDR2 SDRAM modules are a high-band- width, large-capacity channel solution that have a narrow host interface. FBDIMMs use DDR2 SDRAM devices isolated from the channel behind an AMB buffer on the FBDIMM ...

Page 8

Electrical Specifications Stresses greater than those listed in Table 7 may cause permanent damage to the module. This is a stress rating only, and functional operation of the module at these or any other conditions outside those indicated in the ...

Page 9

I Conditions and Specifications DD Table 10: I Conditions DD Symbol Condition I _Idle_0 Idle current, single, or last DIMM: L0 state; Idle (0 percent bandwidth); Primary channel DD enabled; Secondary channel disabled; CKE HIGH; Command and address lines stable; ...

Page 10

Table 14: I Specifications – 2GB DDR2-533 DD Symbol I _Idle_0 2,200 CC I 1,620 DD 6.5 Total power Table 15: I Specifications – 2GB DDR2-667 DD Symbol I _Idle_0 2,600 CC ...

Page 11

Serial Presence-Detect Table 17: Serial Presence-Detect EEPROM DC Operating Conditions Parameter/Condition Supply voltage Input high voltage: logic 1; all inputs Input low voltage: logic 0; all inputs Output low voltage 3mA OUT Input leakage current GND ...

Page 12

Table 19: Serial Presence-Detect Matrix – SDRAM Device and Module Byte Description 0 CRC range SPD bytes total Bytes used 1 SPD revision 2 Key byte/DRAM device type 3 Voltage levels of this assembly 4 SDRAM addressing: Device rows/columns/banks 5 ...

Page 13

Table 19: Serial Presence-Detect Matrix – SDRAM Device and Module (continued) Byte Description Bits 7:4: ΔT 33 (MAX) (DRAM case temperature difference between C MAX case temperature and baseline MAX case temperature), the baseline MAX case temperature is 85°C; Bits ...

Page 14

Table 20: Serial Presence-Detect – AMB and CRC Byte Description 80 FBDIMM reserved byte 81 Channel protocol supported (lower byte) 82 Channel protocol supported (upper byte) 83 Back-to-back turnaround clock cycles t 84 Buffer read access at CK for MAX ...

Page 15

Table 20: Serial Presence-Detect – AMB and CRC (continued) Byte Description 114 AMB postinitialization bytes 115 AMB manufacturer’s ID code (lower byte) 116 AMB manufacturer’s ID code (upper byte) 126–127 CRC for bytes 0–116, 1GB/2GB 150 Informal AMB revision tag ...

Page 16

Module Dimensions Figure 4: 240-Pin DDR2 FBDIMM 0.5 (0.02) R (4X) 1.5 (0.059 (4X) 2.60 (0.102) D (2X) 5.2 (0.205) TYP 1.25 (0.0492) Pin 1 TYP 1.0 (0.039) TYP 9.9 (0.39) TYP 5.48 (0.216) (4X) TYP 3.1 ...

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