DEMO9S12NE64E Freescale Semiconductor, DEMO9S12NE64E Datasheet - Page 7

DEMO BOARD FOR 9S12NE64

DEMO9S12NE64E

Manufacturer Part Number
DEMO9S12NE64E
Description
DEMO BOARD FOR 9S12NE64
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheet

Specifications of DEMO9S12NE64E

Contents
*
Processor To Be Evaluated
MC9S12NE64
Maximum Operating Temperature
+ 50 C
Minimum Operating Temperature
- 10 C
Operating Supply Voltage
6 V to 12 V
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12NE
Rohs Compliant
Yes
For Use With/related Products
MC9S12NE64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
General Information
10
S50 is a slide switch (SW3) connected to I/O pin PG<4>. When this switch is
in the 1 position PG<4> is pulled high to 3.3 VDC through a 10K ohm resistor.
When S50 is in the 0 position PG<4> is tied directly to GND.
J3 is the Background Debug Mode (BDM) header. It is a 2x3 100 mil
center header compatible with BDM programming hardware such as
P&E’s Multilink.
J50 is a 40-pin I/O connector that can be used to interface with other
boards.
J51 is the Ethernet connector that connects the DEMO9S12NE64 to the
network card of a PC via the included Crossover Ethernet cable.
J52 is barrel power socket that accepts a 6.3mm power suppply plug. The
center pin of this connector is positive.
J53 is a DB-9 connector connected to the Serial Communication
Interface (SCI) of the MC9S12NE64. This connector has a Data Carrier
Equipment (DCE) pinout.
DEMO9S12NE64 User’s Manual, Rev. 0.8
Figure 1-1 DEMO9S12NE64 Case Silk
Freescale Semiconductor

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