COP8SG-EPU National Semiconductor, COP8SG-EPU Datasheet
COP8SG-EPU
Specifications of COP8SG-EPU
Related parts for COP8SG-EPU
COP8SG-EPU Summary of contents
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... COP888xG/CS Family 8-Bit CMOS ROM Based Microcontrollers with 4k to 24k Memory, Comparators and USART General Description Note: COP8SG devices are form-fit-function compatible su- persets of the COP888xG/CL/CS Family devices, and are replacements for these in new designs, and design up- grades with minimum effort. The COP888xG ROM based microcontrollers are highly inte- grated COP8 ™ ...
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Key Features (Continued) Additional Peripheral Features n Idle Timer n Multi-Input Wake-Up (MIWU) with optional interrupts (8) n Two analog comparators (one for the CS series) n WATCHDOG and Clock Monitor logic n MICROWIRE/PLUS serial I/O I/O Features n Memory ...
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Connection Diagrams Top View Order Number COP884CS-XXX/WM, COP984CS-XXX/WM, COP984CSH-XXX/WM, COP684CS-XXX/WM, COP884CG-XXX/WM, COP884EG-XXX/WM or COP884CS-XXX/N, COP984CS-XXX/N, COP984CSH-XXX/N, COP884CG-XXX/N, COP884EG-XXX/N See NS Package Number M28B or N28A Plastic Chip Carrier Top View Order Number COP688CS-XXX/V, COP888CS-XXX/V, COP988CS/CSH-XXX/V, COP688EG-XXX/V, COP888EG-XXX/V, COP988EG-XXX/V, COP888CG-XXX/V, COP688GG-XXX/V, ...
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Connection Diagrams Pinouts for 28-, 40- and 44-Pin Packages Port Type L0 I/O MIWU L1 I/O MIWU L2 I/O MIWU L3 I/O MIWU L4 I/O MIWU L5 I/O MIWU L6 I/O MIWU L7 I/O MIWU G0 I/O INT G1 WDOUT ...
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... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( Voltage at Any Pin DC Electrical Characteristics 98xEG and 98xCS: 0˚C T +70˚C unless otherwise specified A Parameter Operating Voltage COP98xCS, COP98xEG ...
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DC Electrical Characteristics 98xEG and 98xCS: 0˚C T +70˚C unless otherwise specified A Parameter TRI-STATE Leakage Allowable Sink/Source Current per Pin D Outputs (Sink) All others Maximum Input Current without Latchup (Notes 9, 10) RAM Retention Voltage Input ...
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... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( Voltage at Any Pin DC Electrical Characteristics 88xCG, 88xCS, and 88xEG: −40˚C T +85˚C unless otherwise specified A Parameter Operating Voltage ...
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DC Electrical Characteristics 88xCG, 88xCS, and 88xEG: −40˚C T +85˚C unless otherwise specified A Parameter TRI-STATE Leakage Allowable Sink/Source Current per Pin D Outputs (Sink) All others Maximum Input Current without Latchup (Notes 9, 10) RAM Retention Voltage ...
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... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( Voltage at Any Pin DC Electrical Characteristics 888GG, 888HG, and 888KG: −40˚C T +85˚C unless otherwise specified A Parameter Operating Voltage ...
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DC Electrical Characteristics 888GG, 888HG, and 888KG: −40˚C T +85˚C unless otherwise specified A Parameter without Latchup (Notes 9, 10) RAM Retention Voltage Input Capacitance Load Capacitance Electrical Characteristics 888GG, 888HG, and 888KG: −40˚C T ...
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... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage ( Voltage at Any Pin DC Electrical Characteristics 68xCS and 68xxG: −55˚C T +125˚C unless otherwise specified A Parameter Operating Voltage Power Supply Ripple (Note 6) ...
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AC Electrical Characteristics 68xCS and 68xxG: −55˚C T +125˚C unless otherwise specified A Parameter Instruction Cycle Time ( Crystal, Resonator R/C Oscillator 68xCS & 68xEG only) Inputs t SETUP t HOLD Output Propagation Delay PD1 ...
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Comparators AC and DC Characteristics Typical Performance Characteristics (Continued) DS012829-4 FIGURE 3. MICROWIRE/PLUS Timing (−55˚ +125˚C) A DS012829-30 DS012829-32 13 DS012829-31 DS012829-33 www.national.com ...
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Typical Performance Characteristics www.national.com (−55˚ +125˚C) (Continued) A DS012829-34 DS012829-36 DS012829-38 14 DS012829-35 DS012829-37 DS012829-39 ...
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Typical Performance Characteristics Pin Descriptions V and GND are the power supply pins. All V CC pins must be connected. CKI is the clock input. This can come from an R/C generated oscillator crystal oscillator (in conjunction with ...
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Pin Descriptions (Continued) phase of the SK clock. The G7 configuration bit, if set high, enables the clock start up delay after HALT when the R/C clock configuration is used. Config Reg. G7 CLKDLY G6 Alternate SK Port G has ...
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Data Memory Segment RAM Extension (Continued) 0200 to 027F for data segment 2, etc FF00 to FF7F for data segment 255. The base address range from 0000 to 007F represents data segment 0. Figure 5 illustrates how the ...
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Reset (Continued) > Power Supply Rise Time FIGURE 6. Recommended Reset Circuit Oscillator Circuits The chip can be driven by a clock input on the CKI input pin which can be between DC and 10 MHz. The ...
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CONTROL REGISTERS ICNTRL Register (Address X'00E8) Reserved LPEN T0PND T0EN µWPND µWEN Bit 7 The ICNTRL register contains the following bits: Reserved This bit is reserved and should be zero LPEN L Port Interrupt Enable (Multi-Input Wakeup/ Interrupt) T0PND Timer ...
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Timers (Continued) The underflows can be programmed to toggle the TxA output pin. The underflows can also be programmed to generate in- terrupts. Underflows from the timer are alternately latched into two pending flags, TxPNDA and TxPNDB. The user must ...
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Timers (Continued) FIGURE 10. Timer in Input Capture Mode TIMER CONTROL FLAGS The control bits and their functions are summarized below. TxC3 Timer mode control TxC2 Timer mode control TxC1 Timer mode control TxC0 Timer Start/Stop control in Modes 1 ...
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Timers (Continued) The timer mode control bits (TxC3, TxC2 and TxC1) are detailed below: Mode TxC3 TxC2 Power Save Modes The ...
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Power Save Modes (Continued) micro-controller in this mode of operation are typically around 30% of normal power requirement of the microcon- troller. As with the HALT mode, the device can be returned to nor- mal operation with a reset, or ...
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Multi-Input Wakeup (Continued) If the L port bits have been used as outputs and then changed to inputs with Multi-Input Wakeup/Interrupt, a safety procedure should also be followed to avoid wakeup condi- tions. After the selected L port bits have ...
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USART (Continued) USART CONTROL AND STATUS REGISTERS The operation of the USART is programmed through three registers: ENU, ENUR and ENUI. DESCRIPTION OF USART REGISTER BITS ENU-USART Control and Status Register (Address at 0BA) PEN PSEL1 XBIT9/ CHL1 CHL0 PSEL0 ...
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USART (Continued) CHL1, CHL0: These bits select the character frame format. Parity is not included and is generated/verified by hardware. Read/Write, cleared on reset. CHL1 = 0, CHL0 = 0 The frame contains eight data bits. CHL1 = 0, CHL0 ...
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USART Operation The USART has two modes of operation: asynchronous mode and synchronous mode. ASYNCHRONOUS MODE This mode is selected by resetting the SSEL (in the ENUI register) bit to zero. The input frequency to the USART is 16 times ...
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USART Operation (Continued) USART INTERRUPTS The USART is capable of generating interrupts. Interrupts are generated on Receive Buffer Full and Transmit Buffer Empty. Both interrupts have individual interrupt vectors. Two bytes of program memory space are reserved for each inter- ...
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Baud Clock Generation FIGURE 15. USART BAUD Clock Divisor Registers TABLE 3. Baud Rate Divisors (1.8432 MHz Prescaler Output) Baud Baud Rate Rate Divisor − 1 (N-1) 110 1046 (110.03) 134.5 855 (134.58) 150 767 300 383 600 191 1200 ...
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Baud Clock Generation As an example, considering Asynchronous Mode and a CKI clock of 4.608 MHz, the prescaler factor selected is: 4.608/1.8432 = 2.5 The 2.5 entry is available in Table 4 . The 1.8432 MHz pres- caler output is ...
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Comparators (Continued) I2 Comparator1 positive input I1 Comparator1 negative input Only Comparator 1 is available on the CS series. A Comparator Select Register (CMPSL) is used to enable the comparators, read the outputs of the comparators inter- nally, and enable ...
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Interrupts (Continued) MASKABLE INTERRUPTS All interrupts other than the Software Trap are maskable. Each maskable interrupt has an associated enable bit and pending flag bit. The pending bit is set to 1 when the interrupt condition occurs. The state of ...
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Interrupts (Continued) ample, if the Software Trap routine is located at 0310 Hex, then the vector location 0yFE and -0yFF should contain the data 03 and 10 Hex, respectively. When a Software Trap in- terrupt occurs and the VIS instruction ...
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Interrupts (Continued) VIS Execution When the VIS instruction is executed it activates the arbitra- tion logic. The arbitration logic generates an even number between E0 and FE (E0, E2, E4, E6 etc...) depending on which active interrupt has the highest ...
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Interrupts (Continued) FIGURE 18. VIS Flowchart 35 DS012829-44 www.national.com ...
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Interrupts (Continued) Programming Example: External Interrupt PSW =00EF CNTRL =00EE RBIT 0,PORTGC RBIT 0,PORTGD SBIT IEDG, CNTRL SBIT EXEN, PSW SBIT GIE, PSW WAIT: JP WAIT . . . .=0FF VIS . . . .=01FA .ADDRW SERVICE . . INT_EXIT: ...
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Interrupts (Continued) NON-MASKABLE INTERRUPT Pending Flag There is a pending flag bit associated with the non-maskable interrupt, called STPND. This pending flag is not memory- mapped and cannot be accessed directly by the software. The pending flag is reset to ...
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WATCHDOG The device contains a WATCHDOG and clock monitor. The WATCHDOG is designed to detect the user program getting stuck in infinite loops resulting in loss of program control or “runaway” programs. The Clock Monitor is used to detect the ...
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... RPND instruction. MICROWIRE/PLUS MICROWIRE/PLUS is a serial synchronous communications interface. The MICROWIRE/PLUS capability enables the de- vice to interface with any of National Semiconductor’s MI- CROWIRE peripherals (i.e. A/D converters, display drivers PROMs etc.) and with other microcontrollers which sup- port the MICROWIRE interface ...
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MICROWIRE/PLUS (Continued) Key Data Match Don’t Care Mismatch Don’t Care Don’t Care Don’t Care TABLE 9. MICROWIRE/PLUS Master Mode Clock Select SL1 SL0 Where t is the instruction cycle clock c MICROWIRE/PLUS OPERATION Setting ...
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MICROWIRE/PLUS (Continued) Memory Map All RAM, ports and registers (except A and PC) are mapped into data memory address space. Address Contents S/ADD REG 0000 to 006F On-Chip RAM bytes (112 bytes) 0070 to 007F Unused RAM Address Space (Reads ...
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... COP8SGE) 0300–037F On-Chip 128 RAM Bytes (Reads as undefined data on COP8SGE) Note: Reading memory locations 0070H–007FH (Segment 0) will return all ones. Reading unused memory locations 0080H–00AFH (Segment 0) will return undefined data. Reading memory locations from other Seg- ments (i.e., Segment 2, Segment 3, … ...
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Instruction Set Register and Symbol Definition Registers A 8-Bit Accumulator Register B 8-Bit Address Register X 8-Bit Address Register S 8-Bit Segment Register SP 8-Bit Stack Pointer Register PC 15-Bit Program Counter Register PU Upper 7 Bits ...
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Instruction Set (Continued) INSTRUCTION SET ADD A,Meml ADD ADC A,Meml ADD with Carry SUBC A,Meml Subtract with Carry AND A,Meml Logical AND ANDSZ A,Imm Logical AND Immed., Skip if Zero OR A,Meml Logical OR XOR A,Meml Logical EXclusive OR IFEQ ...
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Instruction Set (Continued) INSTRUCTION SET (Continued) JSRL Addr. Jump SubRoutine Long JSR Addr Jump SubRoutine JID Jump InDirect RET RETurn from subroutine RETSK RETurn and SKip RETI RETurn from Interrupt INTR Generate an Interrupt NOP No OPeration [SP] PL, [SP−1] ...
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Instruction Execution Time Most instructions are single byte (with immediate addressing mode instructions taking two bytes). Most single byte instructions take one cycle time to execute. Skipped instructions require x number of cycles to be skipped, where x equals the ...
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Instruction Execution Time (Continued) Nibble Lower 47 www.national.com ...
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... COP8 Demo, MetaLink Debugger, I/O cables and power supply. www.national.com • COP8–EVAL-ICUxx: Very Low cost evaluation and de- sign test board for COP8ACC and COP8SGx Families, from ICU. Real-time environment with add-on A/D, D/A, and EEPROM. Includes software routines and reference designs. ...
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... Windows. For testing and debugging software instruc- tions only (No I/O or interrupt support). Vendor Tools National COP8-NSEVAL COP8-NSEVAL COP8-NSASM COP8-NSASM COP8-MLSIM COP8-MLSIM COP8-NSDEV COP8-NSDEV COP8-EPU COP8SG-EPU (-1 or -2) COP8-DM COP8SG-DM (10 MHz) DM Target DM-COP8/28D-SO Adapters DM-COP8/44P-44Q Development COP8FGx7 (15 MHz) Devices COP8SGx7 (10 MHz) OTP COP8SA-PGMA Programming ...
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Development Support MetaLink COP8-EPU EPU-8SGx (-1 or -2) COP8-DM DM4-COP8-888xG ( DM5-COP8-FGx (15 MHz) or DM4-COP8-SGx (10 MHz), plus PS-10, plus DM-COP8/xxx (ie. 28D) DM Target MHW-CNVxx (xx = 33, 34 Adapters etc.) ...
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Development Support (Continued) WHERE TO GET TOOLS Tools are ordered directly from the following vendors. Please go to the vendor’s web site for current listings of distributors. Vendor Home Office Aisys U.S.A.: Santa Clara, CA 1-408-327-8820 fax: 1-408-327-8830 Byte Craft ...
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Physical Dimensions Order Number COP688KG-XXX/N, COP888KG-XXX/N www.national.com inches (millimeters) unless otherwise noted Molded Dual-In-Line Package (N) NS Package Number N40A Plastic Leaded Chip Carrier (V) Order Number COP688KG-XXXV, COP888KG-XXX/V NS Package Number V44A 52 ...
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... NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant ...