COP8SG-EPU National Semiconductor, COP8SG-EPU Datasheet - Page 12

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COP8SG-EPU

Manufacturer Part Number
COP8SG-EPU
Description
BOARD PROTOTYPE/TARGET COP8
Manufacturer
National Semiconductor
Type
MCUr
Datasheet

Specifications of COP8SG-EPU

Contents
*
For Use With/related Products
Cop 8
For Use With
COP8SG-EPU - BOARD PROTOTYPE/TARGET COP8
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
www.national.com
Instruction Cycle Time (t
68xCS & 68xEG only)
Inputs
Output Propagation Delay
MICROWIRE
MICROWIRE Hold Time (t
MICROWIRE Output Propagation Delay (t
Input Pulse Width (Note 11)
Reset Pulse Width
Input Offset Voltage
Input Common Mode Voltage Range
Voltage Gain
Low Level Output Current
High Level Output Current
DC Supply Current per Comparator (When Enabled)
Response Time
AC Electrical Characteristics 68xCS and 68xxG:
Note 6: Maximum rate of voltage change must be less than 0.5 V/ms.
Note 7: Supply current is measured after running 2000 cycles with a square wave CKI input, CKO open, inputs at rails and outputs open.
Note 8: The HALT mode will stop CKI from oscillating in the RC and the Crystal configurations. Measurement of IDD HALT is done with device neither sourcing or
sinking current; with L, C, and G0–G5 programmed as low outputs and not driving a load; all outputs programmed low and not driving a load; all inputs tied to V
clock monitor and comparators disabled. Parameter refers to HALT mode entered via setting bit 7 of the G Port data register. Part will pull up CKI during HALT in crys-
tal clock mode.
Note 9: Pins G6 and RESET are designed with a high voltage input network. These pins allow input voltages greater than V
to V
(typical). These two pins will not latch up. The voltage at the pins must be limited to less than 14V. WARNING: Voltages in excess of 14V will cause damage to the
pins. This warning excludes ESD transients.
Note 10: Parameter characterized but not tested.
Note 11: t
Comparators AC and DC Characteristics
−55˚C
V
Crystal, Resonator
R/C Oscillator
t
t
t
SO, SK
All Others
Interrupt Input High Time
Interrupt Input Low Time
Timer 1, 2, 3 Input High Time
Timer 1, 2, 3 Input Low Time
SETUP
HOLD
PD1
CC
CC
, t
= 5V, −40˚C
when biased at voltages greater than V
PD0
c
T
= Instruction Cycle Time
A
+125˚C unless otherwise specified
Setup Time (t
Parameter
Parameter
T
A
c
)
UWH
+85˚C.
UWS
) (Note 10)
) (Note 10)
CC
(the pins do not have source current when biased at a voltage below V
UPD
)
0.4V
V
V
100 mV Overdrive,
100 pF Load
V
V
V
V
R
V
V
CC
CC
CC
CC
CC
CC
OL
OH
L
= 2.2k, C
= 0.4V
= 4.6V
12
Conditions
4.5V
4.5V
4.5V
4.5V
4.5V
4.5V
Conditions
V
IN
L
V
= 100 pF
CC
− 1.5V
Min
200
Min
1.0
3.0
0.4
1.6
1.6
60
20
56
1
1
1
1
1
CC
). The effective resistance to V
300k
Typ
±
CC
Typ
10
and the pins will have sink current
V
CC
Max
Max
±
220
250
DC
DC
0.7
1
1
25
− 1.5
CC
Units
is 750
Units
µs
µs
ns
ns
µs
µs
ns
ns
ns
µs
V/V
mV
mA
mA
t
t
t
t
µA
µs
c
c
c
c
V
CC
;

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