AD9748ACP-PCB Analog Devices Inc, AD9748ACP-PCB Datasheet - Page 17

• Manufacturer Part Number: AD9748ACP-PCB
• Description: BOARD EVAL FOR AD9748ACP
• Manufacturer: Analog Devices Inc
• Series: TxDAC®r

Specifications of AD9748ACP-PCB

• Rohs Status: RoHS non-compliant
• Number Of Dac's: 1
• Number Of Bits: 8
• Outputs And Type: 1, Differential
• Sampling Rate (per Second): 210M
• Data Interface: Parallel
• Settling Time: 11ns
• Dac Type: Current
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD9748

POWER AND GROUNDING CONSIDERATIONS,
POWER SUPPLY REJECTION
Many applications seek high speed and high performance under
less than ideal operating conditions. In these application circuits,
the implementation and construction of the printed circuit
board is as important as the circuit design. Proper RF techniques
must be used for device selection, placement, and routing as
well as power supply bypassing and grounding to ensure
optimum performance. Figure 35 to Figure 38 illustrate the
recommended printed circuit board ground, power, and signal
plane layouts implemented on the AD9748 evaluation board.
One factor that can measurably affect system performance is
the ability of the DAC output to reject dc variations or ac noise
superimposed on the analog or digital dc power distribution.
This is referred to as the power supply rejection ratio (PSRR).
For dc variations of the power supply, the resulting performance
of the DAC directly corresponds to a gain error associated with
the DAC’s full-scale current, I
is common in applications where the power distribution is
generated by a switching power supply. Typically, switching
power supply noise occurs over the spectrum from tens of
kilohertz to several megahertz. The PSRR vs. frequency of the
AD9748 AVDD supply over this frequency range is shown in
Figure 30.
85
80
75
70
65
60
55
50
45
40
0
Figure 30. Power Supply Rejection Ratio (PSRR)
2
4
FREQUENCY (MHz)
OUTFS
6
. AC noise on the dc supplies
8
10
12
Rev. A | Page 17 of 24
Note that the ratio in Figure 30 is calculated as amps out/volts
in. Noise on the analog power supply has the effect of modulating
the internal switches, and therefore the output current. The
voltage noise on AVDD, therefore, is added in a nonlinear
manner to the desired IOUT. Due to the relative different size of
these switches, the PSRR is very code dependent. This can produce
a mixing effect that can modulate low frequency power supply
noise to higher frequencies. Worst-case PSRR for either one of
the differential DAC outputs occurs when the full-scale current
is directed toward that output. As a result, the PSRR measurement
in Figure 30 represents a worst-case condition in which the
digital inputs remain static and the full-scale output current of
20 mA is directed to the DAC output being measured.
The following illustrates the effect of supply noise on the analog
supply. Suppose a switching regulator with a switching
frequency of 250 kHz produces 10 mV of noise and, for simplicity’s
sake (ignoring harmonics), all of this noise is concentrated at
250 kHz. To calculate how much of this undesired noise appears as
current noise superimposed on the DAC’s full-scale current,
I
250 kHz. To calculate the PSRR for a given R
units of PSRR are converted from A/V to V/V, adjust the curve
in Figure 30 by the scaling factor 20 Ω log (R
if R
PSRR of the DAC at 250 kHz, which is 85 dB in Figure 30,
becomes 51 dB V
Proper grounding and decoupling should be a primary
objective in any high speed, high resolution system. The
AD9748 features separate analog and digital supplies and
ground pins to optimize the management of analog and digital
ground currents in a system. In general, AVDD, the analog
supply, should be decoupled to ACOM, the analog common,
as close to the chip as physically possible. Similarly, DVDD, the
digital supply, should be decoupled to DCOM as close to the
chip as physically possible.
For those applications that require a single 3.3 V supply for both
the analog and digital supplies, a clean analog supply can be
generated using the circuit shown in Figure 31. The circuit
consists of a differential LC filter with separate power supply
and return lines. Lower noise can be attained by using low ESR
type electrolytic and tantalum capacitors.
OUTFS
TTL/CMOS
CIRCUITS
LOGIC
LOAD
POWER SUPPLY
, users must determine the PSRR in dB using Figure 30 at
Figure 31. Differential LC Filter for Single 3.3 V Applications
is 50 Ω, then the PSRR is reduced by 34 dB (that is,
3.3V
OUT
FERRITE
BEADS
/V
IN
).
100μF
ELECT.
10μF–22μF
TANT.
LOAD
LOAD
, such that the
). For instance,
0.1μF
CER.
AD9748
AVDD
ACOM