EZ80F910200ZCO Zilog, EZ80F910200ZCO Datasheet - Page 63

• Manufacturer Part Number: EZ80F910200ZCO
• Description: KIT DEV FOR EZ80F91 W/C-COMPILER
• Manufacturer: Zilog

Specifications of EZ80F910200ZCO

• Processor To Be Evaluated: eZ80F91
• Interface Type: Ethernet
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 269-3154; EZ80F910200ZCO

UM014220-0508
D
C
B
A
-DIS_EM
A[23:0]
D[7:0]
MD[7:0]
-CS0
-CS1
-CS2
-CS3
-MEMRQ
-IORQ
PHI
-RD
-WR
SDA
SCL
VDD
GND
J3
2
1
MD[7:0]
-CS2
-CS3
-IORQ
GND
-CS0
-CS1
PHI
-RD
-WR
SDA
SCL
VDD
GND
5
5
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
VDD
-EM_EN
A0
A1
-RD
-WR
A2
A3
A4
A5
R13
10K
D[7:0]
D[7:0]
10
11
12
13
16
3
4
5
6
7
9
2
U15
22V10A/LCC_0
I1
I2
I3
I4
I5
I6
I7
I8
I9
I10
I11
CLK/I0
D0
D1
D2
D3
D4
D5
D6
D7
-CT_WR
D0
D1
D2
D3
D4
D5
D6
D7
-AN_WR
VCC
GND
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8
I/O9
17
18
19
20
21
23
24
25
26
27
28
14
13
14
17
18
11
13
14
17
18
11
3
4
7
8
1
3
4
7
8
1
U12
74HCT374
U14
74HCT374
GND
VDD
D0
D1
D2
D3
D4
D5
D6
D7
CLK
OE
D0
D1
D2
D3
D4
D5
D6
D7
CLK
OE
Figure 19. eZ80F91 Development Platform Schematic Diagram, #2 of 5
-CS3
-EM_RD
-EM_WR
-CT_WR
-AN_WR
A6
A7
GND
GND
VCC
VCC
-EX_FL_DIS
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
C7
0.1uF
-FL_DIS
-DIS_ETH
2
5
6
9
12
15
16
19
20
10
2
5
6
9
12
15
16
19
20
10
4
4
VDD
J15
VDD
-EM_WR_OE
J11
VDD
VDD
GND
GND
TRIG1
TRIG2
R6 10K
2
1
2
1
10K
CT4
CT3
CT2
CT1
CT0
MD[7:0]
C6
0.1uF
-MRESET
R7
C5
0.1uF
-EM_WR
-EM_RD
-EM_WR_OE
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0
-EX_FL_DIS
-MRESET
AN6
-FL_DIS
AN0
-CS0
A23
A22
A21
A20
A19
A18
A17
A16
AN1
AN5
-CS2
AN2
AN3
AN4
10
14
13
11
23
3
4
5
6
7
8
9
1
2
U16
74LCX543/SO
A1
A2
A3
A4
A5
A6
A7
A8
LEAB
LEBA
OEAB
OEBA
CEAB
CEBA
12
11
2
9
4
5
6
GND
VCC
10
11
12
13
16
B1
B2
B3
B4
B5
B6
B7
B8
3
4
5
6
7
9
2
U10
22V10A/LCC
1
I1
I2
I3
I4
I5
I6
I7
I8
I9
I10
I11
CLK/I0
22
21
20
19
18
17
16
15
24
12
3
3
10
VDD
3
VCC
GND
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8
I/O9
EM_D7
EM_D6
EM_D5
EM_D4
EM_D3
EM_D2
EM_D1
EM_D0
GND
7
17
18
19
20
21
23
24
25
26
27
28
14
8
EM_D7
EM_D6
EM_D5
EM_D4
EM_D3
EM_D2
EM_D1
EM_D0
LTP-757
D5
C8
0.1uF
-EM_EN
VDD
GND
GND
TRIG1
TRIG2
-CS_EX_IN
-MEM_CEN1
-MEM_CEN2
-MEM_CEN3
-MEM_CEN4
C2
0.1uF
-L_RD
-DIS_FL
9
5
Pin2
Pin2
JP4
1
JP5
1
SW1
SW PUSHBUTTON
SW2
SW PUSHBUTTON
SW3
SW PUSHBUTTON
U8C
TC74LVT125
U8B
TC74LVT125
-MEM_CEN1
-MEM_CEN2
-MEM_CEN3
-MEM_CEN4
8
6
M_RING
2
GND
2
M_TIP
SCL
SDA
VDD
R10
10K
-DIS_IRDA
-CON_DIS
-DIS_0
R11
10K
1
2
3
4
5
6
7
8
Title
Size
Date:
U13
SCL
SDA
OVERR
M_IN_A
M_IN_B
M_IN_C
M_IN_D
GND
PCA8550
B
SIDACTOR P3100SB
U11
R12
10K
Schematic, eZ80L92 Evaluation Board
Document Number
Friday, October 10, 2003
C3
0.001uF
-CS_EX_IN
-MEM_CEN1
-MEM_CEN2
-MEM_CEN3
N_MUX_O
M_OUT_C
M_OUT_D
MUX_SEL
M_OUT_A
M_OUT_B
GND
PB0_T0_I
PB1_T1_I
PB2_SS
GND
eZ80F91 Development Kit
VDD
WP
16
15
14
13
12
11
10
9
12
2
4
6
8
U8D
TC74LVT125
96C0858-001
Ferrite Core
C4
0.001uF
J19
EX_SEL
VDD
GND
GND
11
Sheet
T1
1
3
5
7
1
1
ID_2
ID_1
ID_0
User Manual
2
-DIS_1
-MOD_DIS
RJ14
1
2
3
4
of
-CS_EX
P4
1
2
3
4
Schematics
Logic
4
Rev
C
D
C
B
A
58