EVAL6562-375W STMicroelectronics, EVAL6562-375W Datasheet - Page 3

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EVAL6562-375W

Manufacturer Part Number
EVAL6562-375W
Description
EVAL BOARD FOR L6562-375 SERIES
Manufacturer
STMicroelectronics
Datasheet

Specifications of EVAL6562-375W

Product
Power Management Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Table 4. Pin Description
Table 5. Electrical Characteristics
(T
SUPPLY VOLTAGE
SUPPLY CURRENT
MULTIPLIER INPUT
ERROR AMPLIFIER
---------------------
Symbol
V
I
V
j
V
V
start-up
I
1
2
3
4
5
6
7
8
V
MULT
= -25 to 125°C, V
V
Hys
I
CCOff
I
MULT
V
CCon
V
MUL T
INV
I
CC
I
K
INV
CC
q
q
Z
CS
COMP
MULT
GND
Operating range
Turn-on threshold
Turn-off threshold
Hysteresis
Zener Voltage
Start-up Current
Quiescent Current
Operating Supply Current
Quiescent Current
Input Bias Current
Linear Operation Range
Output Max. Slope
Gain
Voltage Feedback Input
Threshold
Line Regulation
Input Bias Current
ZCD
INV
Vcc
Pin
GD
CS
(2)
Inverting input of the error amplifier. The information on the output voltage of the PFC pre-
regulator is fed into the pin through a resistor divider.
Output of the error amplifier. A compensation network is placed between this pin and INV (pin
#1) to achieve stability of the voltage control loop and ensure high power factor and low THD.
Main input to the multiplier. This pin is connected to the rectified mains voltage via a resistor
divider and provides the sinusoidal reference to the current loop.
Input to the PWM comparator. The current flowing in the MOSFET is sensed through a resistor,
the resulting voltage is applied to this pin and compared with an internal sinusoidal-shaped
reference, generated by the multiplier, to determine MOSFET’s turn-off.
Boost inductor’s demagnetization sensing input for transition-mode operation. A negative-going
edge triggers MOSFET’s turn-on.
Ground. Current return for both the signal part of the IC and the gate driver.
Gate driver output. The totem pole output stage is able to drive power MOSFET’s and IGBT’s
with a peak current of 600 mA source and 800 mA sink. The high-level voltage of this pin is
clamped at about 12V to avoid excessive gate voltages in case the pin is supplied with a high
Vcc.
Supply Voltage of both the signal part of the IC and the gate driver. The supply voltage upper
limit is extended to 22V min. to provide more headroom for supply voltage changes.
Parameter
CC
= 12, C
O
= 1 nF; unless otherwise specified)
After turn-on
(1)
(1)
I
Before turn-on, V
After turn-on
@ 70 kHz
During OVP (either static or
dynamic) or V
V
V
V
V
T
10.3 V < Vcc < 22 V
Vcc = 10.3 V to 22V
V
CC
j
VFF
MULT
COMP
MULT
INV
= 25 °C
= 20 mA
= 0 to 3 V
= 0 to 4 V
= 0 to 0.5V
= 1 V, V
= Upper clamp
Test Condition
ZCD
COMP
CC
Function
=150 mV
=11V
= 4 V
(1)
0 to 3
2.465
Min.
10.3
1.65
2.44
8.7
2.2
0.5
11
22
Typ.
9.5
2.5
3.5
1.9
0.6
2.5
12
25
40
2
2.535
Max.
10.3
3.75
2.56
2.8
2.2
0.7
22
13
28
70
-1
-1
5
5
L6562
Unit
V/V
mA
mA
mA
1/V
mV
µA
µA
µA
V
V
V
V
V
V
V
3/16

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