MCIMX31LITEKITC Freescale Semiconductor, MCIMX31LITEKITC Datasheet - Page 48

BOARD DEV FOR I.MX31

MCIMX31LITEKITC

Manufacturer Part Number
MCIMX31LITEKITC
Description
BOARD DEV FOR I.MX31
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheet

Specifications of MCIMX31LITEKITC

Contents
Module and Misc Hardware
For Use With/related Products
i.MX31
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Electrical Characteristics
48
1
Timing parameters are relevant only to SDR SDRAM. For the specific DDR SDRAM data related timing parameters, see
Table 38
SD10
SD9
ID
and
Data out hold time
Active to read/write command period
Table
SDR SDRAM CLK parameters are being measured from the 50%
point—that is, high is defined as 50% of signal value and low is defined as
50% of signal value. SD1 + SD2 does not exceed 7.5 ns for 133 MHz.
The timing parameters are similar to the ones used in SDRAM data
sheets—that is,
are driven by the ESDCTL at the negative edge of SDCLK and the
parameters are measured at maximum memory frequency.
Table 34. DDR/SDR SDRAM Read Cycle Timing Parameters (continued)
39.
1
Table 34
MCIMX31/MCIMX31L Technical Data, Rev. 4.1
Parameter
indicates SDRAM requirements. All output signals
NOTE
Symbol
tOH
tRC
Min
1.8
10
Freescale Semiconductor
Max
clock
Unit
ns

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