HM6264 Hitachi Semiconductor, HM6264 Datasheet
HM6264
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HM6264 Summary of contents
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... SRAM (8-kword Description The Hitachi HM6264B is 64k-bit static RAM organized 8-kword and low power consumption by 1.5 m CMOS process technology. The device, packaged in 450 mil SOP (foot print pitch width), 600 mil plastic DIP, 300 mil plastic DIP, is available for high density mounting ...
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... HM6264B Series Ordering Information Type No. Access time HM6264BLP- HM6264BLP-10L 100 ns HM6264BLSP- HM6264BLSP-10L 100 ns HM6264BLFP-8LT 85 ns HM6264BLFP-10LT 100 ns Pin Arrangement Pin Description Pin name Function A0 to A12 Address input I/O1 to I/O8 Data input/output CS1 Chip select 1 CS2 Chip select 2 Package 600-mil, 28-pin plastic DIP (DP-28) ...
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... Block Diagram A11 A12 I/O1 I/O8 CS2 CS1 WE OE Row Memory array decoder 256 256 Column I/O Input Column decoder data control A10 A3 Timing pulse generator Read, Write control HM6264B Series ...
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... HM6264B Series Function Table WE CS1 OE CS2 Mode H Not selected (power down) L Not selected (power down Output disable Read Write Write Note Absolute Maximum Ratings Parameter *1 Power supply voltage *1 Terminal voltage Power dissipation ...
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... A — — 0.4 V 2.4 — — 5 +25 C and not guaranteed. CC Symbol Min Typ Cin — — C — — I/O HM6264B Series = Test conditions Vin = CS1 = CS2 = I CS1 = V , CS2 = ...
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... HM6264B Series AC Characteristics ( + Test Conditions Input pulse levels: 0 2.4 V Input and output timing reference level: 1.5 V Input rise and fall time Output load: 1 TTL Gate + C Read Cycle Parameter Read cycle time Address access time Chip select access time ...
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... Read Timing Waveform (1) ( Address CS1 CS2 OE High Impedance Dout Read Timing Waveform (2) ( Address Dout ) Valid address CO1 t LZ1 t CO2 t LZ2 OLZ , Valid address HM6264B Series t HZ1 t HZ2 t OHZ Valid data Valid data ...
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... HM6264B Series Read Timing Waveform (3) ( CS1 CS2 Dout Address must be valid prior to or simultaneously with CS1 going low or CS2 going high. Note CO1 t LZ1 t CO2 t LZ2 t HZ1 t HZ2 Valid data ...
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... WHZ OHZ must satisfy the following equation to avoid a problem WP min. HM6264B Series HM6264B-10L Max Min Max Unit — 100 — ns — 80 — ns — 0 — ns — 80 — ns — 60 — ns — 0 — ...
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... HM6264B Series Write Timing Waveform (1) (OE Clock) Address OE CS1 CS2 WE Dout Din If CS1 goes low or CS2 goes high simultaneously with WE going low or after WE going Note: 1. low, the outputs remain in the high impedance state Valid address OHZ ...
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... If CS1 is low and CS2 is high during this period, I/O pins are in the output state. Input 4. signals of opposite phase to the outputs must not be applied to I/O pins Valid address WHZ HM6264B Series Valid data *3 ...
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... HM6264B Series Low V Data Retention Characteristics ( + Parameter Symbol V for data retention Data retention current I CCDR Chip deselect to data t CDR retention time Operation recovery time t R Notes: 1. Reference data max read cycle time. ...
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... Package Dimensions HM6264BLP Series (DP-28) 36.5 Max 28 1 1.2 1.9 Max 2.54 ± 0.25 35 0.48 ± 0.10 HM6264B Series 15.24 + 0.11 0.25 – 0.05 0° – 15° Unit: mm ...
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... HM6264B Series HM6264BLSP Series (DP-28N) 37.32 Max 28 1 1.30 2.20 Max 2.54 ± 0.25 HM6264BLTM Series (FP-28DA) 18.3 18.75 Max 28 1 0.895 1.27 ± 0.10 36. 0.48 ± 0. 0.10 0.40 – 0.05 Unit: mm 7.62 + 0.11 0.25 – 0.05 0° – 15° Unit: mm 11.8 ± 0.3 0 – 10 ° 1.0 ...
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... Brisbane, CA. 94005-1835 Dornacher Straß D-85622 Feldkirchen Tel: 415-589-8300 München Fax: 415-583-4207 Tel: 089-9 91 80-0 Fax: 089 HM6264B Series Hitachi Europe Ltd. Hitachi Asia Pte. Ltd. Electronic Components Div. 16 Collyer Quay #20-00 Northern Europe Headquarters Hitachi Tower Whitebrook Park Singapore 0104 ...