isp1301 NXP Semiconductors, isp1301 Datasheet
isp1301
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isp1301 Summary of contents
Page 1
... Logic Devices (PLDs) and any system chip set (with the USB host or device function built-in but without the USB physical layer) to interface to the physical layer of the USB. The ISP1301 can interface to devices with digital I/O voltages in the range of 1. 3.6 V. The ISP1301 is available in HVQFN24 package. ...
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... ISP1301_3 Product data sheet 0.85 mm Rev. 03 — 21 February 2006 ISP1301 USB OTG transceiver 2 ) halogen-free and lead-free package © Koninklijke Philips Electronics N.V. 2006. All rights reserved. and ID BUS Version SOT616-1 ...
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... Rev. 03 — 21 February 2006 USB OTG transceiver BUS CHARGE PUMP 19 V BUS COMPARATORS 18 ID DETECTOR PULL-UP AND PULL-DOWN RESISTORS CARKIT INTERRUPT DETECTOR 15 16 004aaa748 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. ISP1301 CGND V BUS ...
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... INT_N 5 SPEED 6 Transparent top view SPEED 6 DGND (exposed INT_N 5 die pad) 4 RESET_N ISP1301BS SCL 3 SDA 2 1 ADR/PSW terminal 1 index area Bottom view Rev. 03 — 21 February 2006 ISP1301 USB OTG transceiver AGND DAT/VP 13 SE0/VM 004aaa542 13 SE0/VM 14 DAT/ ...
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... Rev. 03 — 21 February 2006 USB OTG transceiver [3] Description ADR input — sets the least-significant I address bit of the ISP1301; latched-on reset (including power-on reset) PSW output — enables or disables the external charge pump after reset bidirectional; push-pull input; 3-state output 2 serial I C-bus data input and output bidirectional ...
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... C1 and C2 charge pump capacitor pin 2; typically use a 100 nF capacitor between pins C1 and C2 ground for the charge pump supply voltage for the interface logic signals (1. 3.6 V) digital ground Section 7.10. © Koninklijke Philips Electronics N.V. 2006. All rights reserved. ISP1301 ...
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... The session valid comparator is a TTL-level input that determines when V enough for a session to start. Both the A-device and the B-device use this comparator to detect when a session is started. The A-device also uses this comparator to indicate when a session is completed. The session valid threshold of the ISP1301 is between 0.8 V and 2.0 V. 7.3.3 Session end comparator The session end comparator determines when V threshold of 0 ...
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... The variable pull-up resistor hardware is implemented to meet the USB ECN_27% specification. 7.6 Analog USB Transceiver (ATX) The behavior of the USB transceiver depends on operation mode of the ISP1301: • In USB mode, the USB transceiver block performs USB full-speed or low-speed transceiver functions. This includes differential driver, differential receiver and single-ended receivers. • ...
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... ADR_REG. If bit ADR_REG = 0, then the ADR/PSW pin will be driven HIGH. If bit ADR_REG = 1, then the ADR/PSW pin will be driven LOW. The ADR/PSW pin can be used to turn on or off the external charge pump. The ISP1301 built-in charge pump supports V support (for example, 50 mA), an external charge pump may be needed. In this case, the ADR/PSW pin can act as a power switch for the external charge pump ...
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... The ISP1301 transmits USB data on the USB line under the following conditions: • Bit TRANSP_EN = 0 • Bit UART_EN = 0 • Pin OE_N/INT_N = LOW Table 10 operation. The RCV pin is not used during transmit. The ISP1301 receives USB data from the USB line under the following conditions: ISP1301_3 Product data sheet +3.3 V 100 ADR/PSW V ...
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... BUS 8 mA. 7.10. This pin is an input and supplies power to the ISP1301. The ISP1301 operates when V is between 2.7 V and 4.5 V. 7.10.11 C1 and C2 The C1 and C2 pins are to connect the flying capacitor of the charge pump. The output current capacity of the charge pump depends on the value of the capacitor. For maximum effi ...
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... AGND, CGND and DGND AGND, CGND and DGND are ground pins for analog, charge pump and digital circuits, respectively. These pins can be connected separately or together depending on the system performance requirements. 8. Modes of operation There are four types of modes in the ISP1301: • Power modes • Direct I • ...
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... In unidirectional mode, the DAT/VP and SE0/VM pins are always inputs. In bidirectional mode, the direction of these signals depends on the OE_N/INT_N input. Table 6 The ISP1301 is in USB mode when both the TRANSP_EN and UART_EN bits are cleared. 8.4 Transparent modes 8.4.1 Transparent general-purpose buffer mode In transparent general-purpose buffer mode, the DAT/VP and SE0/VM pins are connected to the DP and DM pins, respectively ...
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... SDA [1] In USB suspend mode, the ISP1301 can drive the DP and DM lines, if the OE_N/INT_N input (when the OE_INT_EN bit is not set) is LOW. In such a case, these outputs are driven as in USB functional modes, but with the full-speed characteristics, irrespective of the value of the SPEED input pin or the SPEED_REG bit ...
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... LOW LOW HIGH LOW HIGH LOW HIGH HIGH HIGH HIGH Table 9. The register bits and the pins used in and Section 7.10, respectively. © Koninklijke Philips Electronics N.V. 2006. All rights reserved. ISP1301 RCV [3] [6] RxD RCV ...
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... LOW HIGH 0 HIGH Rev. 03 — 21 February 2006 ISP1301 USB OTG transceiver Differential driver output value from DAT/ and SE0/ output value from DAT/ and DM if SE0/ otherwise, drive both DP and DM LOW output value from DAT/ and DM ...
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... LOW HIGH 0 HIGH HIGH 1 LOW LOW 1 HIGH LOW 1 LOW HIGH 1 HIGH HIGH Rev. 03 — 21 February 2006 ISP1301 USB OTG transceiver Output pin DAT/VP SE0/VM RCV RCV HIGH last value of RCV HIGH LOW HIGH LOW LOW LOW RCV LOW last value of RCV ...
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... Vendor ID register. Access Value R 04CCh Access Value Description R 1301h Product ID of the ISP1301 shows the bit description of this register. Rev. 03 — 21 February 2006 USB OTG transceiver Reference Section 10.1.1 on page 18 Section 10.1.2 on page 19 Section 10.1.3 on page 20 Section 10.1.4 on page 21 Description Philips Semiconductors’ ...
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... When set, the ATX is in transparent mode. DAT_SE0 0 — VP_VM mode 1 — DAT_SE0 mode; see SUSPEND_REG Sets the ISP1301 in suspend mode, if bit SPD_SUSP_CTRL = 1. 0 — active-power mode 1 — USB suspend mode SPEED_REG Sets the rise time and the fall time of the transmit driver in USB modes, if bit SPD_SUSP_CTRL = 1. 0 — ...
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... USB modes: 0 — controlled by pins SPEED and SUSPEND 1 — controlled by bit SPEED_REG and bit SUSPEND_REG of the Mode Control 1 register GLOBAL_PWR_DN 0 — normal operation 1 — sets the ISP1301 to Power-down mode Activities on the I see Section 11 provides the bit allocation of the OTG Control register. 6 ...
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... R Interrupt Source register: bit description Symbol Description CR_INT DP pin is above the carkit interrupt threshold (0 0.6 V) BDIS_ACON set when bit BDIS_ACON_EN is set, and the ISP1301 asserts bit DP_PULLUP after detecting the B-device disconnect ID_FLOAT ID pin is floating DM_HI DM pin is HIGH ID_GND ID pin is connected to ground ...
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... VBUS_VLD status change from provides the bit allocation of this register. Rev. 03 — 21 February 2006 USB OTG transceiver ID_GND DP_HI SESS_VLD VBUS_VLD R/S/C R/S/C R/S ID_GND DP_HI SESS_VLD VBUS_VLD R/S/C R/S/C R/S/C © Koninklijke Philips Electronics N.V. 2006. All rights reserved. ISP1301 0 0 R/S R/S ...
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... Any of the signals given in can generate an interrupt when the signal becomes either LOW or HIGH. After Rev. 03 — 21 February 2006 USB OTG transceiver ID_GND DP_HI SESS_VLD VBUS_VLD R/S/C R/S/C R/S/C © Koninklijke Philips Electronics N.V. 2006. All rights reserved. ISP1301 0 0 R/S/C 2 C-bus ...
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... Philips Semiconductors command to the ISP1301 to assert the DP pull-up. An alternative method is for the A-device transceiver to automatically assert the DP pull-up after detecting an SE0 from the B-device. The sequence of events is: After finishing data transfers between the A-device and the B-device and before suspending the bus, the A-device sends SOFs. The B-device receives these SOFs, and does not transmit any packet back to the A-device ...
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... The clock always stops at its falling edge. The waveform is given in GLOBAL_PWR_DN Fig 7. Clock stopped using the GLOBAL_PWR_DN bit 11.2 Clock wake-up events The clock wakes up when any of the following events occur on the ISP1301 pins: • SCL goes LOW. • V BUS SESS_VLD bit in the Interrupt Enable High register is set ...
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... ISP1301_3 Product data sheet SESS_VLD CLOCK 20 s BUS ID_FLOAT CLOCK 20 s ID_FLOAT CLOCK 20 s DP_HI or DM_HI CLOCK Rev. 03 — 21 February 2006 ISP1301 USB OTG transceiver 004aaa219 004aaa220 004aaa221 20 s 004aaa434 © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... I C-bus device address byte 1 bit description Symbol Description A[6:0] Device address: The device address of the ISP1301 is: 01 0110 (A0). R/W_N Read or write command. 0 — write 1 — read illustrates the byte sequence. Transfer format description for one-byte write Description master starts with a START condition ...
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... STOP condition Rev. 03 — 21 February 2006 ISP1301 USB OTG transceiver …continued 1. When the incremented address © Koninklijke Philips Electronics N.V. 2006. All rights reserved. ...
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... Philips Semiconductors S device select S device select write data Fig 13. Writing data to the ISP1301 registers 12.4 Read format A read operation can be performed in two ways: • Current address read: to read the register at the current address. – Single register read • Random address read: to read N registers starting at a specified address. N defines the number of registers to be read only the start register is read. – ...
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... master generates an acknowledgment : Rev. 03 — 21 February 2006 USB OTG transceiver ACK no ACK P read data K 004aaa570 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. ISP1301 ...
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... ACK ACK S device select register address K ACK ACK read data .... maximum, rollover to 0 random access multiple read Rev. 03 — 21 February 2006 ISP1301 USB OTG transceiver …continued 1. This is the last ACK no ACK rd P read data K ACK ACK rd ...
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... Open-drain output pull-up voltage on pins SCL, SDA and INT_N. ISP1301_3 Product data sheet Conditions < pins DP, DM, ID AGND, CGND BUS and DGND all other pins Conditions . CC Rev. 03 — 21 February 2006 ISP1301 USB OTG transceiver Min Max 0.5 +4.6 0.5 +4.6 0 0.5 V CC(I/O) - 100 [ ...
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... Min Typ [1] 3.0 - 2.7 - 1 [3] < 0 < Min Typ Max - - 0.3V 0. CC(I/ 0 0. CC(I/ CC(I/ © Koninklijke Philips Electronics N.V. 2006. All rights reserved. ISP1301 Max Unit 3.6 V 3 300 300 A Unit V CC(I/ ...
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... each on DP and DM +85 C; unless otherwise specified. amb Conditions on pin ID to VREG3V3 bit ID_PULLDOWN = 1 bit ID_GND = 1 bit ID_FLOAT = 1 bit ID_GND = 0; bit ID_FLOAT = 0 Rev. 03 — 21 February 2006 ISP1301 USB OTG transceiver Min Typ Max 0 0 0.8 2.0 ...
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... V = 4.65 V BUS mA; BUS load C = 100 nF ext charge pump disabled valid voltage mA load CC connect to VREG3V3 when VBUS_CHRG = 1 connect to GND when VBUS_DISCHRG = 1 ID pin connected to GND Rev. 03 — 21 February 2006 ISP1301 USB OTG transceiver Min Typ Max 8 4. 0.2 4.4 - 4.65 0.2 - 0.8 - 150 - 0 ...
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... DAT/VP, SE0/VM to DP, DM; see Figure 17 and Figure 21 OE_N/INT_N to DP, DM; see Figure 18 and Figure 22 OE_N/INT_N to DP, DM; see Figure 18 and Figure 22 Rev. 03 — 21 February 2006 ISP1301 USB OTG transceiver Min Typ Max 700 1000 1300 ; +85 C; unless TERM amb Min Typ ...
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... V t PLH(drv) differential V CRS data lines 2 CRS 0 PLH(rcv) t PLH(se 0 SE0/VM © Koninklijke Philips Electronics N.V. 2006. All rights reserved. ISP1301 Max Unit 0 PHL(drv) V CRS 004aaa573 V CRS t PHL(rcv) t PHL(se) ...
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... V = VREG3V3 for t and t . PZL PLZ D.U.T. Rev. 03 — 21 February 2006 USB OTG transceiver t TIO input output V TERM 1.5 k test point 004aaa448 test point 33 500 004aaa517 test point 25 pF 004aaa709 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. ISP1301 004aaa439 ...
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... HD;DAT 2 Rev. 03 — 21 February 2006 USB OTG transceiver Standard mode Min Max - 100 4.0 - 4.7 - 4.0 - 4.7 - 250 - 1000 - 300 4 HD;STA BUF SU;STO P C-bus © Koninklijke Philips Electronics N.V. 2006. All rights reserved. ISP1301 Unit kHz 004aaa577 ...
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... C10 0 100 k V ADR/PSW CC(I/ SDA CGND 2 23 SCL RESET_N INT_N SPEED BUS 6 19 ISP1301BS VREG3V3 SUSPEND AGND 8 17 OE_N/INT_N DAT/ RCV SE0/ DGND 0 0.1 F GND ...
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... F R9 100 ADR/PSW V CC(I/ SDA CGND 23 2 SCL RESET_N C1 0 INT_N SPEED BUS 19 6 ISP1301BS VREG3V3 SUSPEND AGND 17 8 OE_N/INT_N DAT/ SE0/VM RCV DGND 0 0.1 F GND 5 ...
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... 4.1 2.25 4.1 2.25 0.5 2.5 3.9 1.95 3.9 1.95 REFERENCES JEDEC JEITA MO-220 - - - Rev. 03 — 21 February 2006 USB OTG transceiver detail 0.5 2.5 0.1 0.05 0.05 0.1 0.3 EUROPEAN PROJECTION © Koninklijke Philips Electronics N.V. 2006. All rights reserved. ISP1301 SOT616 ISSUE DATE 01-08-08 02-10- ...
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... ISP1301_3 Product data sheet 2 called small/thin packages. Rev. 03 — 21 February 2006 ISP1301 USB OTG transceiver 3 350 mm so called © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... LBGA, LFBGA, SQFP, [3] , TFBGA, VFBGA, XSON , SO, SOJ [8] [9] [8] , PMFP , WQCCN.. measured in the atmosphere of the reflow oven. The package Rev. 03 — 21 February 2006 ISP1301 USB OTG transceiver Soldering method Wave Reflow not suitable suitable [4] not suitable suitable suitable suitable [5] [6] ...
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... Personal Digital Assistant Programmable Logic Device Power-On Reset Power-On Reset Pulse Single-Ended Zero Start-Of-Frame Session Request Protocol Universal Serial Bus USB Implementers Forum Rev. 03 — 21 February 2006 ISP1301 USB OTG transceiver © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... V conditions”: updated the maximum value of V Product data - Product data - Rev. 03 — 21 February 2006 ISP1301 USB OTG transceiver Doc. number Supersedes - ISP1301- 9397 750 14337 ISP1301-01 9397 750 11355 - © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... Notice — All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of Koninklijke Philips Electronics N.V. Rev. 03 — 21 February 2006 ISP1301 USB OTG transceiver © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... Table 51: Characteristics of I/O stages of I (SDA, SCL Table 52: Suitability of surface mount IC packages for wave and reflow soldering methods . . . . . . . . 44 Table 53: Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 54: Revision history . . . . . . . . . . . . . . . . . . . . . . . . 46 Rev. 03 — 21 February 2006 ISP1301 USB OTG transceiver 2 C-bus lines continued >> © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... BUS Fig 10. Clock wake- change ( .26 Fig 11. Clock wake- change ( .26 Fig 12. Clock wake-up by data line SRP . . . . . . . . . . . . .26 Fig 13. Writing data to the ISP1301 registers . . . . . . . . .29 Fig 14. Current address read . . . . . . . . . . . . . . . . . . . . . .30 Fig 15. Random address read . . . . . . . . . . . . . . . . . . . . .31 Fig 16. Rise time and fall time . . . . . . . . . . . . . . . . . . . . .37 Fig 17. Timing of DAT/VP and SE0/ and DM . .37 Fig 18 ...
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... Static characteristics . . . . . . . . . . . . . . . . . . . 33 16 Dynamic characteristics . . . . . . . . . . . . . . . . . 36 17 Application information . . . . . . . . . . . . . . . . . 40 18 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 42 19 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 19.1 Introduction to soldering surface mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 19.2 Reflow soldering 19.3 Wave soldering Rev. 03 — 21 February 2006 ISP1301 USB OTG transceiver continued >> © Koninklijke Philips Electronics N.V. 2006. All rights reserved ...
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... No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Published in The Netherlands ISP1301 USB OTG transceiver Date of release: 21 February 2006 Document number: ISP1301_3 ...