MC74VHCT125AD ONSEMI [ON Semiconductor], MC74VHCT125AD Datasheet

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MC74VHCT125AD

Manufacturer Part Number
MC74VHCT125AD
Description
Quad Bus Buffer
Manufacturer
ONSEMI [ON Semiconductor]
Datasheet
1.MC74VHCT125AD.pdf (8 pages)

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MC74VHCT125A
Quad Bus Buffer
with 3–State Control Inputs
fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
set High to place the output into the high impedance state.
be used as a level converter for interfacing 3.3V to 5.0V, because it has
full 5V CMOS level output swings.
between 0V and 5.5V are applied, regardless of the supply voltage.
The output structures also provide protection when V CC = 0V. These
input and output structures help prevent device destruction caused by
supply voltage – input/output voltage mismatch, battery backup, hot
insertion, etc.
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7V, allowing the interface of 5V systems
to 3V systems.
April, 2000 – Rev. 1
The MC74VHCT125A is a high speed CMOS quad bus buffer
The MC74VHCT125A requires the 3–state control input (OE) to be
The VHCT inputs are compatible with TTL levels. This device can
The VHCT125A input structures provide protection when voltages
The internal circuit is composed of three stages, including a buffer
High Speed: t PD = 3.8ns (Typ) at V CC = 5V
Low Power Dissipation: I CC = 4 A (Max) at T A = 25 C
TTL–Compatible Inputs: V IL = 0.8V; V IH = 2.0V
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2V to 5.5V Operating Range
Low Noise: V OLP = 0.8V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
Chip Complexity: 72 FETs or 18 Equivalent Gates
Semiconductor Components Industries, LLC, 2000
OE1
OE2
OE3
OE4
Active–Low Output Enables
A1
A2
A3
A4
LOGIC DIAGRAM
10
12
13
2
1
5
4
9
3
6
8
11
Y1
Y2
Y3
Y4
FUNCTION TABLE
A
H
X
L
Inputs
VHCT125A
OE
H
L
L
Output
Y
H
L
Z
1
For detailed package marking information, see the Marking
Diagram section on page 4 of this data sheet.
MC74VHCT125AD
MC74VHCT125ADT
MC74VHCT125AM
14–LEAD SOIC
Device
CASE 751A
MARKING DIAGRAM (Top View)
D SUFFIX
ORDERING INFORMATION
PIN CONNECTION AND
GND
OE1
OE2
A1
Y1
A2
Y2
http://onsemi.com
14–LEAD SOIC EIAJ
1
2
3
4
5
6
7
CASE 965
M SUFFIX
SOIC EIAJ
Package
TSSOP
Publication Order Number:
SOIC
14
13
12
10
11
14–LEAD TSSOP
9
8
MC74VHCT125A/D
CASE 948G
DT SUFFIX
V CC
OE4
A4
Y4
OE3
A3
Y3
55 Units/Rail
96 Units/Rail
50 Units/Rail
Shipping

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MC74VHCT125AD Summary of contents

Page 1

... Semiconductor Components Industries, LLC, 2000 April, 2000 – Rev. 1 14–LEAD SOIC D SUFFIX CASE 751A MARKING DIAGRAM (Top View) For detailed package marking information, see the Marking Diagram section on page 4 of this data sheet. Device MC74VHCT125AD MC74VHCT125ADT MC74VHCT125AM FUNCTION TABLE VHCT125A Inputs Output ...

Page 2

MAXIMUM RATINGS* Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...

Page 3

AC ELECTRICAL CHARACTERISTICS Î Î Î Î ...

Page 4

A t PHL t PLH 1.5V Y Figure 1. TEST POINT OUTPUT DEVICE UNDER TEST *Includes all probe and jig capacitance Figure 3. Test Circuit VHCT125A AWLYWW ...

Page 5

SEATING PLANE 0.25 (0.010 MC74VHCT125A PACKAGE DIMENSIONS D SUFFIX PLASTIC SOIC PACKAGE CASE 751A–03 ISSUE 0.25 (0.010 ...

Page 6

K 14X REF 0.10 (0.004) 0.15 (0.006 L PIN 1 IDENT 0.15 (0.006 –V– C 0.10 (0.004) –T– SEATING G D PLANE MC74VHCT125A PACKAGE DIMENSIONS DT SUFFIX ...

Page 7

PLASTIC SOIC EIAJ PACKAGE VIEW 0.13 (0.005) M 0.10 (0.004) MC74VHCT125A PACKAGE DIMENSIONS M SUFFIX CASE 965–01 ISSUE O NOTES ...

Page 8

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any ...

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