pca9632 NXP Semiconductors, pca9632 Datasheet
pca9632
Available stocks
Related parts for pca9632
pca9632 Summary of contents
Page 1
... Individual and Group PWM controller values. The LED output driver is programmed to be either open-drain with current sink capability totem-pole with sink source capability The PCA9632 operates with a supply voltage range of 2 5.5 V and the outputs are 5.5 V tolerant. LEDs can be directly connected to the LED output ( mA, 5 ...
Page 2
... NXP Semiconductors The Software Reset (SWRST) Call allows the master to perform a reset of the PCA9632 through the I their default state causing the outputs to be set high-impedance. This allows an easy and quick way to reconfigure all device registers to the same condition. 2. Features I 40 power reduction compared to PCA9633 I 4 LED drivers ...
Page 3
... RESET V SS REGISTER X BRIGHTNESS CONTROL 6.25 kHz/ 1.56 kHz 400 kHz OSCILLATOR Fig 1. Block diagram of PCA9632 PCA9632_1 Objective data sheet Package Name Description TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm HVSON8 plastic thermal enhanced very thin small outline package; ...
Page 4
... PCA9632 2 4-bit Fm+ I C-bus low power LED driver terminal 1 index area LED0 1 2 LED1 PCA9632TK 3 LED2 4 LED3 002aad041 Transparent top view Fig 3. Pin configuration for HVSON8 pin and the exposed center pad. The V SS © NXP B.V. 2007. All rights reserved. ...
Page 5
... C-bus will acknowledge the address if sent by the I 2 C-bus addresses 2 C-bus addresses can be used 2 C-bus (volatile programming) 2 C-bus addresses are disabled. PCA9632 does not send an 2 C-bus subaddress SUBADRx” Rev. 01 — 28 September 2007 PCA9632 2 4-bit Fm+ I C-bus low power LED driver Figure 4 ...
Page 6
... Control register Following the successful acknowledgement of the slave address, LED All Call address or LED Sub Call address, the bus master will send a byte to the PCA9632, which will be stored in the Control register. The lowest 4 bits are used as a pointer to determine which register will be accessed (D[3:0]). The highest 3 bits are used as Auto-Increment fl ...
Page 7
... Rev. 01 — 28 September 2007 2 4-bit Fm+ I C-bus low power LED driver Table 3 (AI[2:0] = 001, 010, and 011) are Table 4). When AI[ the Auto-Increment flag Table 3 for rollover values. For … … 07 PCA9632 02 … as long © NXP B.V. 2007. All rights reserved ...
Page 8
... PCA9632 does not respond PCA9632 responds PCA9632 does not respond PCA9632 responds PCA9632 does not respond to LED All Call I 1* PCA9632 responds to LED All Call I Rev. 01 — 28 September 2007 2 4-bit Fm+ I C-bus low power LED driver Type ...
Page 9
... See Section 7.6 “Using the PCA9632 with and without external drivers” [2] Change of the outputs at the STOP command allows synchronizing outputs of more than one PCA9632. Applicable to registers from 02h (PWM0) to 08h (LEDOUT) only. 7.3.3 PWM registers PWMx—Individual brightness control registers Table 7. ...
Page 10
... GRPPWM - Group duty cycle control register (address 06h) bit description Register Bit Symbol GRPPWM 7:0 GDC[7:0] GDC 7:4 ,0000 = ---------------------------------------- - 256 GDC 7:2 ,00 = ---------------------------------- - 256 GDC 7:0 = -------------------------- - 256 Rev. 01 — 28 September 2007 PCA9632 2 4-bit Fm+ I C-bus low power LED driver Access Value Description R/W 1111 1111 GRPPWM register © NXP B.V. 2007. All rights reserved. (3) (4) (5) ( ...
Page 11
... Register Bit Symbol SUBADR1 7:1 A1[7:1] 0 A1[0] SUBADR2 7:1 A2[7:1] 0 A2[0] SUBADR3 7:1 A3[7:1] 0 A3[0] Rev. 01 — 28 September 2007 PCA9632 2 4-bit Fm+ I C-bus low power LED driver Access Value Description R/W 0000 0000* GRPFREQ register 1 sec onds Access Value Description R/W 00* LED3 output state control R/W 00* LED2 output state control R/W ...
Page 12
... Bit Symbol ALLCALLADR 7:1 AC[7:1] 0 AC[0] 2 C-bus address allows all the PCA9632s in the bus to be programmed , an internal Power-on reset holds the PCA9632 in a reset DD has reached this point, the reset condition is released and the DD POR 2 C-bus state machine are initialized to their default states (all Rev. 01 — ...
Page 13
... SWRST Call sequence is not correct. 7.6 Using the PCA9632 with and without external drivers The PCA9632 LED output drivers are 5.5 V only tolerant and can sink the device needs to drive LEDs to a higher voltage and/or higher current, use of an external driver is required. • ...
Page 14
... Individual PWM (non-inverted) V (non-inverted) off Individual + Group PWM (inverted) Individual PWM Individual PWM (inverted) (inverted Rev. 01 — 28 September 2007 PCA9632 2 4-bit Fm+ I C-bus low power LED driver External P-type driver External Firmware pull-up resistor required formulas and LED output state values ...
Page 15
... C-bus low power LED driver bits, 256 steps) with 10.73 1 Hz). 10.73 508 510 512 509 511 508 510 512 509 511 PCA9632 002aad101 002aad042 © NXP B.V. 2007. All rights reserved ...
Page 16
... C-bus SDA SCL data line stable; data valid Figure 10.) Rev. 01 — 28 September 2007 PCA9632 2 4-bit Fm+ I C-bus low power LED driver Frequency 1.5625 kHz 190 Hz with 6.25 kHz modulation blink frequency = PWMx frequency = 1.5625 kHz blink frequency = 0. PWMx frequency = 1.5625 kHz Figure 9) ...
Page 17
... START condition Figure SLAVE SLAVE TRANSMITTER/ RECEIVER TRANSMITTER RECEIVER Rev. 01 — 28 September 2007 2 4-bit Fm+ I C-bus low power LED driver P STOP condition 11). MASTER MASTER TRANSMITTER/ MULTIPLEXER RECEIVER SLAVE PCA9632 SDA SCL mba608 2 I C-BUS 002aaa966 © NXP B.V. 2007. All rights reserved ...
Page 18
... Auto-Increment on ALLCALLADR register A P acknowledge from slave STOP condition Rev. 01 — 28 September 2007 PCA9632 2 4-bit Fm+ I C-bus low power LED driver not acknowledge acknowledge clock pulse for acknowledgement 002aaa987 (1) data for register D3, D2, D1, D0 ...
Page 19
... Auto-Increment on data from data from PWM0 ALLCALLADR register A acknowledge from master Rev. 01 — 28 September 2007 PCA9632 2 4-bit Fm+ I C-bus low power LED driver PWM0 register PWM1 register A acknowledge from slave PWMx register A acknowledge from slave ...
Page 20
... SWRST data Byte 2 = 0x5A acknowledge acknowledge from slave(s) from slave(s) PCA9632 is(are) reset. Registers are set to default power-up values. 002aad048 © NXP B.V. 2007. All rights reserved. ( STOP condition ( STOP condition 002aad047 P ...
Page 21
... Limiting values Parameter supply voltage voltage on an input/output pin output current on pin LEDn ground supply current total power dissipation storage temperature ambient temperature Rev. 01 — 28 September 2007 PCA9632 2 4-bit Fm+ I C-bus low power LED driver Conditions Min Max 0.5 +6 ...
Page 22
... C-bus low power LED driver Min Typ 2 MHz - 108 = 0.005 [1] - 1.70 0 1.6 - 2 2.5 PCA9632 Max Unit 5.5 V 150 A 150 A 150 2.0 V +0. 5 100 © NXP B.V. 2007. All rights reserved ...
Page 23
... Input filters on the SDA and SCL inputs suppress noise spikes less than 50 ns. PCA9632_1 Objective data sheet Conditions Standard- mode 2 I C-bus Min [1] 0 4.7 4.0 4.7 4.0 0 [2] 0.3 [3] 0.3 250 4.7 4.0 [5][ [ Rev. 01 — 28 September 2007 PCA9632 2 4-bit Fm+ I C-bus low power LED driver Fast-mode Fast-mode 2 I C-bus Plus I Max Min Max Min 100 0 400 0 - 1.3 - 0.5 - 0.6 - 0.26 - 0.6 - 0.26 - ...
Page 24
... SDA and SCL > less current Load capacitance includes jig and probe capacitance Termination resistance should be equal to the output impedance Z T generators. Rev. 01 — 28 September 2007 PCA9632 2 4-bit Fm+ I C-bus low power LED driver t t HD;STA SU;STA SU ...
Page 25
... JEDEC JEITA Rev. 01 — 28 September 2007 2 4-bit Fm+ I C-bus low power LED driver detail 5.1 0.7 0.94 0.1 0.1 0.1 4.7 0.4 EUROPEAN PROJECTION PCA9632 SOT505 (1) Z 0.70 6 0.35 0 ISSUE DATE 99-04-09 03-02-18 © NXP B.V. 2007. All rights reserved ...
Page 26
... Rev. 01 — 28 September 2007 2 4-bit Fm+ I C-bus low power LED driver scale detail exposed tie bar (4 ) exposed tie bar ( 0.5 0.05 0.1 0.1 0.05 0.3 EUROPEAN PROJECTION PCA9632 SOT908-1 c ISSUE DATE 05-09-26 05-10-05 © NXP B.V. 2007. All rights reserved ...
Page 27
... Package placement • Inspection and repair • Lead-free soldering versus PbSn soldering 17.3 Wave soldering Key characteristics in wave soldering are: PCA9632_1 Objective data sheet 4-bit Fm+ I Rev. 01 — 28 September 2007 PCA9632 2 C-bus low power LED driver © NXP B.V. 2007. All rights reserved ...
Page 28
... Lead-free process (from J-STD-020C) Package reflow temperature ( C) 3 Volume (mm ) < 350 260 260 250 Figure 25. Rev. 01 — 28 September 2007 PCA9632 2 4-bit Fm+ I C-bus low power LED driver Figure 25) than a PbSn process, thus 350 220 220 350 to 2000 > 2000 260 260 ...
Page 29
... Most Significant Bit Negative-channel Metal Oxide Semiconductor Printed-Circuit Board Positive-channel Metal Oxide Semiconductor Pulse Width Modulation Red/Green/Blue Red/Green/Blue/Amber System Management Bus Rev. 01 — 28 September 2007 PCA9632 2 4-bit Fm+ I C-bus low power LED driver peak temperature 001aac844 © NXP B.V. 2007. All rights reserved. time ...
Page 30
... Revision history Table 22. Revision history Document ID Release date PCA9632_1 20070928 PCA9632_1 Objective data sheet Data sheet status Change notice Objective data sheet - Rev. 01 — 28 September 2007 PCA9632 2 4-bit Fm+ I C-bus low power LED driver Supersedes - © NXP B.V. 2007. All rights reserved ...
Page 31
... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 28 September 2007 PCA9632 2 4-bit Fm+ I C-bus low power LED driver © NXP B.V. 2007. All rights reserved ...
Page 32
... I C-bus subaddress SUBADRx . . . . . . 11 2 7.3.8 LED All Call I C-bus address, ALLCALLADR. 12 7.4 Power-on reset . . . . . . . . . . . . . . . . . . . . . . . . 12 7.5 Software Reset . . . . . . . . . . . . . . . . . . . . . . . . 13 7.6 Using the PCA9632 with and without external drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7.7 Individual brightness control with group dimming/blinking . . . . . . . . . . . . . . . . . . . . . . . Characteristics of the I 8.1 Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 8.1.1 START and STOP conditions . . . . . . . . . . . . . 16 8.2 System configuration . . . . . . . . . . . . . . . . . . . 17 8 ...