tda8295 NXP Semiconductors, tda8295 Datasheet
tda8295
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tda8295 Summary of contents
Page 1
... FM radio Rev. 01 — 4 February 2008 1. General description The TDA8295 is an alignment-free digital multistandard vision and sound low IF signal PLL demodulator for positive and negative video modulation including AM and FM mono sound processing. It can be used in all countries worldwide for M/N, B/G/H, I, D/K, L and L-accent standard. CVBS and SSIF/mono audio is provided via two DACs. FM radio preprocessing is included for simple interfacing with demodulator/stereo decoder backends ...
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... HVQFN package I CMOS technology (0.12 m 1.2 V and 3 Applications applications I DVD recorders TDA8295_1 Product data sheet Digital global standard low IF demodulator for analog TV and FM radio Rev. 01 — 4 February 2008 TDA8295 2 2 C-bus selectable) © NXP B.V. 2008. All rights reserved. C-bus ...
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... I standard DK and L standard L-accent standard FM radio wide black for L/L-accent standard; flat field white else video low-pass filter (M/N, B/G/H, I, D/K, L/L-accent standard) peak value for B/G/H half, D/K half, I flat, M (FCC) full, L/L-accent full standard Rev. 01 — 4 February 2008 TDA8295 Figure 12) with Min Typ Max 1.08 1.2 1.32 2.97 3.3 3.63 - ...
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... AM Rev. 01 — 4 February 2008 Min Typ DC load; 0.8 1.0 0.8 1.0 4.8 4.85 3.9 4. 1 460 530 125 143 125 143 0.1 - 0.6 TDA8295 Figure 12) with Max Unit 1 MHz - MHz +4 deg - 610 mV 165 mV 165 0 © NXP B.V. 2008. All rights reserved. ...
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... BS.468-4” residual PC; SC1 color bar picture 2 C-bus register like described in Description plastic thermal enhanced very thin quad flat package; no leads; 40 terminals; body 6 6 0.85 mm Rev. 01 — 4 February 2008 TDA8295 Figure Min Typ Max ...
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... DEMODULATOR AGC AMPLIFIER PEAK DETECTOR AND INTEGRATOR CLOCK tuner BIT STREAM PROCESSOR IF AGC DAC AND PLL crystal or frequency reference Fig 1. Functional diagram of TDA8295 H/V PLL VIDEO VIDEO/ NYQUIST LOW-PASS GROUP DELAY SLOPE FILTER EQUALIZER SSIF AND FM RADIO BAND-PASS FILTERS SWITCH UPSAMPLER CORDIC AM/FM ...
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... DDA(PLL)(1V2) XOUT RSET V_IOUTN V DDA(DAC1)(3V3) S_IOUTP SADDR0 RST_N TDI V DDD2(1V2) TCK SDA Rev. 01 — 4 February 2008 TDA8295 30 TRST_N 29 SDA 28 SCL 27 TCK 26 V SSD2 TDA8295HN 25 V DDD2(1V2) 24 TMS 23 TDI 22 TDO 21 RST_N 008aaa095 Pin Symbol 2 IF_NEG 4 V DDD1(1V2) 6 i.c. 8 XIN 10 V SSA(PLL) ...
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... C-bus clock input. SCL is nominally a square wave with a maximum frequency of 400 kHz generated by the system I These two bits allow to select four possible I permits to use several TDA8295 in the same application and/or to avoid conflict with other ICs. The complete I SADDR0 (see also ...
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... V typical) ring digital supply voltage (3.3 V typical) ring digital ground supply voltage (0 V typical) internally connected; connect to ground internally connected; connect to ground internally connected; connect to ground Rev. 01 — 4 February 2008 TDA8295 © NXP B.V. 2008. All rights reserved ...
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... Functional description 8.1 IF ADC The low IF spectrum (1 MHz to 10 MHz) from the Silicon Tuner TDA8725A or TDA1827x is fed symmetrically to the 12-bit IF ADC of the TDA8295, where it is sampled with 54 MHz or 27 MHz. All the anti-aliasing filtering is already done in the Silicon Tuner. 8.2 Filters The internal filters permit to reduce the sampling rate to 13.5 MHz, and to form a complex signal to ease the effort of further signal processing ...
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... However, if the mono audio output has to meet the SCART specification, an external cheap operational amplifier with 12 dB gain becomes necessary, because the low supply voltage for the TDA8295 doesn’t allow such high levels like 2 V (RMS) maximum. 8.7 Tuner IF AGC This AGC controls the tuner IF AGC amplifi ...
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... The correlated or narrow-band AGC loop, closed via the continuous IF AGC amplifier in the TDA8295 first-order integral action and settles at a constant IF input level with a permanent headroom (picture carrier). This headroom is needed for the own sound carriers and the leaking neighbor (N 8 ...
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... STOP condition BYTE 1 A 1000 0100 ack 0000 0001 BYTE 1 A BYTE 2 1000 0100 ack 0000 0010 2 C-bus Write mode Rev. 01 — 4 February 2008 TDA8295 A BYTE 3 A BYTE n data 1 ack .... data SADDR0 BYTE 2 A BYTE 3 ack 0000 0010 ...
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... SADDR1 device address SADDR0 R for read action acknowledge value 1 acknowledge value n acknowledge STOP condition A S BYTE 3 ack start 1000 0101 Rev. 01 — 4 February 2008 TDA8295 A BYTE 4 A BYTE n ack value 1 ack .... value n A BYTE 4 A BYTE 5 ack 0000 0101 ack 0000 0100 © ...
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... NXP Semiconductors 9.2 Register overview The TDA8295 internal registers are accessible by means of the I described in the register description can be found in TDA8295_1 Product data sheet Digital global standard low IF demodulator for analog TV and FM radio Section 9.1. In Table 9 and Table 10 Section Rev. 01 — 4 February 2008 TDA8295 ...
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Table 9. I C-bus registers Index Name 7 (MSB) 6 00h STANDARD STANDARD[7:0] 01h EASY_PROG - - 02h DIV_FUNC AGC_SEL AGC_TRI 03h ADC_HEADR - - 04h PC_PLL_FUNC PC_PLL_BW[4:0] 05h PC_PLL_THRES - - 06h PC_PLL_WGT PHASE_PER PHASE_GAIN[6:0] 07h PC_FLL_FUNC FLL_ON ...
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Table 9. I C-bus registers …continued Index Name 7 (MSB) 6 1Eh CVBS_LEVEL CVBS_LVL[7:0] 1Fh CVBS_EQ CVBS_EQ[7:0] 20h SOUNDSET_1 - AM_FM_SND[1:0] 21h SOUNDSET_2 - - 22h SOUND_LEVEL - - 23h SSIF_LEVEL - - 24h ADC_SAT ADC_SAT[7:0] 25h AFC AFC[7:0] ...
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Table 9. I C-bus registers …continued Index Name 7 (MSB) 6 3Fh PLL_REG07 - 0 40h PLL_REG08 MSEL[7:0] 41h PLL_REG09 NSEL[6:0] 42h PLL_REG10 0 0 43h XTALOSC_CTL - - 44h GPIOREG_0 GP1_CF[3:0] 45h GPIOREG_1 I2CSW_EN I2CSW_ON 46h GPIOREG_2 CLK_INV_GP2 ...
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... CVBS_LEVEL R/W CVBS_EQ R/W SOUNDSET_1 R/W SOUNDSET_2 R/W SOUND_LEVEL R/W SSIF_LEVEL R/W ADC_SAT R AFC R HVPLL_STAT R D_IF_AGC_STAT R T_IF_AGC_STAT R Rev. 01 — 4 February 2008 TDA8295 C-bus access Default value 01h 00h 04h 01h 27h 04h 10h 84h 08h 85h F6h 92h 55h 55h 55h 21h 11h 01h A0h 90h 67h ...
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... R/W not used - PLL_REG04 R/W not used R/W PLL_REG06 R/W PLL_REG07 R/W PLL_REG08 R/W PLL_REG09 R/W PLL_REG10 R/W XTALOSC_CTL R/W GPIOREG_0 R/W GPIOREG_1 R/W GPIOREG_2 R/W Rev. 01 — 4 February 2008 TDA8295 C-bus access Default value - 00h - - 01h 00h - 24h 01h 7Eh 00h 00h 20h - 00h - 61h 00h 1Ah 02h 01h 00h 11h 01h 07h © ...
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... EASY_PROG register (address 01h) bit description Access Value R Table 13) Rev. 01 — 4 February 2008 TDA8295 Description radio standard selection (easy programming) M/N standard B standard G/H standard I standard D/K standard L standard L-accent standard FM radio Description not used ...
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... Rev. 01 — 4 February 2008 TDA8295 D/K L L-accent 04h 06h 07h 01h 01h 01h 27h 27h 27h 04h 04h 04h 10h 10h 10h 84h ...
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... N adjacent sound carriers (PC in L-accent standard). The ADC headroom is related to the sum of all signals. This function is built in for debugging purposes. ADC headroom 3 dB ADC headroom 6 dB ADC headroom 9 dB ADC headroom 12 dB TDA8295 1 © NXP B.V. 2008. All rights reserved ...
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... R R Rev. 01 — 4 February 2008 TDA8295 Description picture carrier PLL loop bandwidth selection loop bandwidth 15 kHz loop bandwidth 30 kHz loop bandwidth 60 kHz loop bandwidth 130 kHz loop bandwidth 280 kHz (for very bad transmitter quality) the picture carrier PLL can be disengaged (e.g. in ...
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... Rev. 01 — 4 February 2008 TDA8295 not used When the settable threshold for the linear phase detector as part of the picture carrier PLL is passed, the phase detector slope is weighted according to the settings in PHASE_GAIN. This feature is of advantage during adverse fi ...
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... CARDET_LEVEL register (address 08h) bit description Access Value R 0001 0 0010 0 0100 0 1000* 1 0000 X XXXX Rev. 01 — 4 February 2008 TDA8295 FLL off (only for debugging) FLL on limitation off limitation 4096 1 FS 2048 1 FS 1024 1 FS 512 ...
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... R/W 55h* R/W 55h* 55h* Rev. 01 — 4 February 2008 TDA8295 With the digitally tuned picture carrier oscillator (DTO_PC), the IF frequency for the picture carrier demodulation can be set. This function is implemented for general purpose applications which are different from nominal TV standards. It can also be used for debugging purposes. The DTO_PC is part of the picture carrier PLL ...
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... Rev. 01 — 4 February 2008 TDA8295 Description video low-pass filter to remove all unwanted frequencies (own sound carriers) above video content (see Figure 7) video low-pass filter 4 MHz video low-pass filter 5 MHz video low-pass filter off The notch filter attenuates the adjacent sound ...
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... SSIF band-pass 4.5 MHz (M/N standard) 0010 SSIF band-pass 6.2 MHz (all other TV standards) 0100 SSIF band-pass 5.5 MHz high selectivity (FM radio) 1000 SSIF band-pass off Rev. 01 — 4 February 2008 001aah359 (1) (2) ( (MHz) TDA8295 Figure 9). © NXP B.V. 2008. All rights reserved ...
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... GRP_DELAY register (address 11h) bit description Access Value R/W - R/W 0 0001* 0 0010 0 0100 0 1000 1 0000 Rev. 01 — 4 February 2008 TDA8295 001aah360 (MHz) Description not used group delay equalization to correct the transmitter predistortion group delay M/N standard group delay B/G/H standard group delay D/K standard group delay L/L-accent standard group delay I (fl ...
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... R Rev. 01 — 4 February 2008 TDA8295 Description This determines the condition under which the digital IF AGC switches to Correlated mode. If D_IF_AGC_CORR is HIGH, the digital IF AGC works in a Correlated mode only if N_H_LOCK, F_H_LOCK and V_LOCK are active (see H/V PLL read-out in Table 44) ...
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... XXh Rev. 01 — 4 February 2008 TDA8295 Description With D_AGC_ERR_LIM the digital IF AGC error slope is limited. This can improve performance under the presence of e.g. impulsive noise that can confuse the AGC detector. limitation off limitation on digital IF AGC 3 dB-loop bandwidth setting ...
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... T_IF_AGC_FORCE register (address 17h) bit description Access Value R R/W 3Fh* XXh Rev. 01 — 4 February 2008 TDA8295 Description tuner IF AGC polarity inverted tuner IF AGC polarity normal tuner IF AGC polarity: the higher the necessary gain, the higher the IF AGC voltage T_IF_AGC_SPEED determines the tuner IF AGC loop speed ...
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... V_SYNC_DEL register (address 1Ch) bit description Symbol Access Value 00 01 VS_POL R VS_DEL[4:0] R/W 0Fh* Rev. 01 — 4 February 2008 TDA8295 Description not used by increasing the IF AGC noise shaper sampling rate (f ), the noise shaper in-band disturbance s (line clamping noise) can be heavily reduced f = 13.5 MHz MHz s f ...
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... In the following some possible settings steps are shown. 51h 5Bh 66h 73h* 81h 91h A2h Rev. 01 — 4 February 2008 TDA8295 Table 44) is not present 3 dB nominal 2 dB nominal 1 dB nominal nominal (p-p) video output level (sync-peak nominal +2 dB nominal +3 dB nominal © ...
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... Rev. 01 — 4 February 2008 TDA8295 Description The video equalizer can be used for the compensation of a principal tuner tilt or to change the video frequency according to customer taste. The figures given are at 5 MHz CVBS with respect to low frequencies (see Figure 10) ...
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... DAC clipping. E.g. for 400 kHz FM deviation, the 12 dB setting of the sound level register (see Table 39) is recommended. high Deviation mode off high Deviation mode on don’t care if SSIF output is chosen (SSIF_SND[1:0] = 10) TDA8295 © NXP B.V. 2008. All rights reserved ...
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... M/N standard due to less nominal frequency deviation +12 dB nominal; implemented for flexibility reasons. With this setting, the adaptation to different standard requirements can be done. don’t care if SSIF output is chosen (SSIF_SND[1:0] = 10) TDA8295 © NXP B.V. 2008. All rights reserved ...
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... H-sync PLL. The lock occurs inside a frequency window, which is determined by the pull-in capability of the FPLL. Rev. 01 — 4 February 2008 TDA8295 12 dB nominal; implemented for flexibility reasons. With this setting, the adaptation to different standard requirements can be done nominal; implemented for flexibility reasons. ...
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... This flag is active proper H-sync (15.625 kHz or 15.734 kHz) is detected (Fast mode). It can be used for debugging and other purposes. This flag is active proper H-sync (15.625 kHz or 15.734 kHz) is detected (Normal mode). It can be used for debugging and other purposes. TDA8295 ...
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... DAC Test mode X don’t care if ADC_TEST = 1 IDENTITY register (address 2Fh) bit description Access Value 1000 1010 chip identification, value corresponds to TDA8295 Rev. 01 — 4 February 2008 TDA8295 Description D_IF_AGC_STAT is the digital IF AGC status readout byte. Contains the digital IF AGC loop DC information ...
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... The default value is logic 0, which means that the chip is active. 0* Normal mode 1 Standby mode R/W This signal clears the TDA8295 through the I (software reset). To activate the reset, just write CLB = 0. This software reset will not affect the content of the registers. 0 activate soft reset 1* normal operation ...
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... NXP Semiconductors 9.3.17 ADC control In the TDA8295 a 12-bit ADC is implemented sampling with a 54 MHz clock (27 MHz optional). Table 51. Legend default value. Bit Symbol 7 GAINSET R CS[2:0] 3 DCIN 2 TWOS 1 SLEEP 0 PD_ADC TDA8295_1 Product data sheet Digital global standard low IF demodulator for analog TV and FM radio ...
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... AD_PLL_BYP R/W 0 AD_SR54M 9.3.18 Video and sound DAC control The TDA8295 implements two 10-bit DAC modules (CVBS and sound outputs) which are sampled by a 108 MHz clock. A reference module derives biasing currents for the two DACs. Table 53. Legend default value. Bit ...
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... R/W When HIGH, PD_DA_REF sets the reference module into its Power-down mode. 0* Normal mode 1 Power-down mode Rev. 01 — 4 February 2008 TDA8295 Section 13.3). Format is signed © NXP B.V. 2008. All rights reserved ...
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... NXP Semiconductors 9.3.19 Clock generation (PLL and crystal oscillator) The TDA8295 implements a crystal oscillator which can be used either in Slave mode or in Oscillator mode (see input clock, and delivers the system clock of the IC (108 MHz). Table 56. Legend default value. Bit 7 and Table 57 ...
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... PLL output clock frequency clk(o)(PLL) VCO VCO ------------ - = --------------- - clk(o)(PLL ------------------------- clk(o)(PLL) VCO VCO ------------ - = --------------- - clk(o)(PLL 150 MHz i TDA8295 © NXP B.V. 2008. All rights reserved ...
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... With HF, the transconductance of the oscillator gain stage can be set. For f > 20 MHz, HF should be set to logic 1. XIN recommended for standard application (16 MHz) recommended if f > 20 MHz XIN reserved, must be set to logic 00 Rev. 01 — 4 February 2008 TDA8295 © NXP B.V. 2008. All rights reserved ...
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... NXP Semiconductors 9.3.20 GPIOs In the TDA8295, three general purpose input/outputs are implemented. Table 62. Legend default value. Bit Symbol GP1_CF[3: GP0_CF[3:0] Table 63. Legend default value. Bit and 4 - TDA8295_1 Product data sheet Digital global standard low IF demodulator for analog TV and FM radio ...
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... GPIO1 is an input pin which value can be read 2 through the I C-bus stored in GP1_VAL. GP0_VAL controls the value of the pin GPIO0 when GP0_CF[3:0] = 0001. When GP0_CF[3:0] = 0000, GPIO0 is an input pin which value can be read 2 through the I C-bus stored in GP0_VAL. TDA8295 64. © NXP B.V. 2008. All rights reserved ...
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... V tolerant) pin XIN amb pins SDA, SCL, SADDR0 and SADDR1; machine model all other pins; machine model depends on the assembly condition of the package and especially on the design of amb Conditions in still air Rev. 01 — 4 February 2008 TDA8295 Min Max 0.5 +3.32 0.5 +5.63 0.5 +3.32 0.5 +3.32 0.5 +5.63 ...
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... V - DD(3V3 0.4 - DD(3V3 [3] - 108 - - - 16 200 250 12 TDA8295 Figure 12) with Max Unit 1. 136 mA 490 mW 369 6 MHz 6 200 10 - MHz - mV - mV/ MHz 6 200 © NXP B.V. 2008. All rights reserved ...
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... L-accent standard) ultrawide superwide wide medium narrow black for L/L-accent standard; flat field white else 128 steps Nyquist filter; all standards Nyquist filter; all standards video low-pass filter (M/N, B/G/H, I, D/K, L/L-accent standard) Rev. 01 — 4 February 2008 TDA8295 Figure Min Typ Max Unit 1.8 2.0 2 ...
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... V (RMS) PC input level change; video settled within 3 dB with TDA8275A; positive modulation with TDA8275A; negative modulation with TDA1827x; positive modulation with TDA1827x; negative modulation IF AGC postfilter Rev. 01 — 4 February 2008 TDA8295 Figure Min Typ Max Unit - 3 4 ...
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... J.63 line 330” all standards except L/L-accent L/L-accent standard in peak white AGC detection 2T pulse carrier levels related to PC sync 3.2 dB 19.2 dB 1.1 MHz (related to black-to-white in RMS, equals CC + 3.6 dB) 3.3 MHz (related to CC) Rev. 01 — 4 February 2008 TDA8295 Figure Min Typ Max Unit - 0.7 0.9 0.8 1.0 1.2 - 1.0 1 ...
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... PC sync dB 19.2 dB 1.1 MHz (related to black-to-white in RMS, equals CC + 3.6 dB) 3.3 MHz (related to CC) all standards; unified weighting filter ( “ITU-T J.61” dBFS Rev. 01 — 4 February 2008 TDA8295 Figure 12) with Min Typ Max Unit - ...
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... SC1 for L and dB, all others 13 dB; residual picture carrier for (CVBS) and 1 k (SSIF/audio). Values are meant for ‘easy programming’ Conditions Hz; 100 mV (p-p); ripple video signal: gray; level TDA8295 stand alone; input level (RMS) PC positive video modulation; L standard; 1.2 V positive video modulation; L standard; 3.3 V negative video modulation; ...
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... FM deviation before pre-emphasis) L/L-accent standard; AM radio modulation degree ( 22.5 kHz FM deviation before pre-emphasis) high Deviation mode (D/K standard China); FM deviation before pre-emphasis 400 kHz; sound level setting Rev. 01 — 4 February 2008 TDA8295 Figure Min Typ Max Unit [10 6.0 ...
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... L/L-accent standard M-BTSC standard FM; for 50 kHz deviation before pre-emphasis (25 kHz for M standard) AM demodulator; AM kHz referenced to 27 kHz FM deviation Rev. 01 — 4 February 2008 TDA8295 Figure 12) with Min Typ Max Unit ...
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... BS.468-4” residual PC; SC1 black picture flat field white picture color bar picture via internal mono sound demodulator; “ITU-R BS.468-4” Radio mode Rev. 01 — 4 February 2008 TDA8295 Figure 12) with Min Typ Max Unit ...
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... FM radio; via SSIF sound demodulator in Mono mode; “ITU-R BS.468-4” Rev. 01 — 4 February 2008 TDA8295 Figure 12) with Min Typ Max Unit ...
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... SC1 for L and dB, all others 13 dB; residual picture carrier for (CVBS) and 1 k (SSIF/audio). Values are meant for ‘easy programming’ Conditions Hz; 100 mV (p-p); ripple video signal: gray; level TDA8295 stand alone FM sound; 1 sound; 3 sound; 1 sound; 3 Hz; 100 mV (p-p); ...
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... NXP Semiconductors 13. Application information 13.1 Typical application Fig 11. Typical application of TDA8295 TDA8295_1 Product data sheet Digital global standard low IF demodulator for analog TV and FM radio 2 I C-bus SDA_O SCL_O V-sync VSYNC TDA8275A IF_POS TDA1827x low IF signal IF_NEG (TUNER ICs) IF_AGC tuner IF AGC reference frequency Rev. 01 — ...
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... C7 2.2 nF AGND R3 R4 100 100 2 I C-bus F1, F2, F3: BLM18AG102SN1 ferrite bead Preferred components: SMD R1 has to be placed near to TDA8295 pin 37 and SMD C7 near to TDA8275A or TDA1827x Fig 12. Detailed application diagram of TDA8295 1.2 V 3.3 V 3 C12 C11 C13 ...
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... With a differential input the performances of the ADC are Rev. 01 — 4 February 2008 supplies with at least 100 nF. Place the external in function of the bias FS + CoarseControl 64 48 Table 55, for CoarseControl signals Table 54 case of single-ended operation, DDA(ADC)(3V3) TDA8295 (1) © NXP B.V. 2008. All rights reserved ...
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... R13 = 75 ; R15 and R16 = 150 ; C5 = 220 pF 120 pF. A performance degradation is not expected in the Power-save mode. The TDA8295 has been designed in such a way, that a simple upgrade of the predecessor TDA8290 is possible: 1. Change the 1.8 V power supply to 1.2 V. This can be done easily with a variable voltage regulator, where the sense pin is grounded. This delivers the band gap voltage of 1. the output. Or take a fi ...
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... The typical crystal frequency value is 16 MHz. The values of the passive components depend on crystal manufacturer. The oscillator can be set in two configurations depending on the origin of the crystal. tuner and the TDA8295 (Slave mode), TDA8295 (Oscillator mode). Fig 14. Reference clock application In Oscillator mode, only a crystal and the load capacitances C1 and C2 need to be connected externally since the feedback resistance is integrated on chip ...
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... Test information 14.1 Boundary scan interface ( “IEEE Std. 1149.1” ) The TDA8295 implements a boundary scan architecture to allow access to, and control of, board test support features within integrated circuits through a TAP. The TAP controller is a synchronous state machine that controls the sequence of operations on the TAP circuitry when the TMS signal changes ...
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... Digital global standard low IF demodulator for analog TV and FM radio BOUNDARY SCAN REGISTER DEVICE ID REGISTER BYPASS REGISTER INSTRUCTION TDI DECODE INSTRUCTION REGISTER TMS TEST ACCESS TCK PORT CONTROLLER Rev. 01 — 4 February 2008 TDA8295 MUX control MUX FF select 3-state enable 001aac078 © NXP B.V. 2008. All rights reserved. TDO ...
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... TCK set-up time TDI and TMS hold time TDI and TMS delay time on pin TDO TCK t su TDI, TMS TDO Rev. 01 — 4 February 2008 TDA8295 Scan type control/observe control/observe control/observe control/observe control/observe control/observe control/observe control/observe control/observe control/observe control/observe control/observe ...
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... 2.5 scale (1) ( 6.1 4.25 6.1 4.25 0.5 4.5 5.9 3.95 5.9 3.95 REFERENCES JEDEC JEITA MO-220 - - - Rev. 01 — 4 February 2008 detail 0.5 0.05 0.1 4.5 0.1 0.05 0.3 EUROPEAN PROJECTION TDA8295 SOT618 ISSUE DATE 01-08-08 02-10-22 © NXP B.V. 2008. All rights reserved ...
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... Solder bath specifications, including temperature and impurities TDA8295_1 Product data sheet Digital global standard low IF demodulator for analog TV and FM radio Rev. 01 — 4 February 2008 TDA8295 © NXP B.V. 2008. All rights reserved ...
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... Lead-free process (from J-STD-020C) Package reflow temperature ( C) 3 Volume (mm ) < 350 260 260 250 Figure 19. Rev. 01 — 4 February 2008 TDA8295 Figure 19) than a PbSn process, thus 350 220 220 350 to 2000 > 2000 260 260 250 245 245 245 © NXP B.V. 2008. All rights reserved. ...
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... Finite Impulse Response Frequency-Locked Loop Frequency Phase-Locked Loop Full Scale General Purpose Input Output Horizontal and Vertical Half Amplitude Duration Integrated Circuit Incidental Carrier Frequency Modulation Rev. 01 — 4 February 2008 TDA8295 peak temperature time 001aac844 © NXP B.V. 2008. All rights reserved ...
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... Sound Carrier Surface Mounted Device Second Sound Intermediate Frequency Set-Top Box Test Access Port Video Cassette Recorder Vertical Interval Test Signal Data sheet status Product data sheet Rev. 01 — 4 February 2008 TDA8295 Change notice Supersedes - - © NXP B.V. 2008. All rights reserved ...
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... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of NXP B.V. Silicon Tuner — trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 4 February 2008 TDA8295 © NXP B.V. 2008. All rights reserved ...
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... Software reset . . . . . . . . . . . . . . . . . . . . . . . . 66 Application hints . . . . . . . . . . . . . . . . . . . . . . . 66 Crystal connection . . . . . . . . . . . . . . . . . . . . . 67 Boundary scan interface (“IEEE Std. 1149.1”) 68 Introduction to soldering Wave and reflow soldering . . . . . . . . . . . . . . . 72 Wave soldering Reflow soldering Data sheet status . . . . . . . . . . . . . . . . . . . . . . 76 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 Disclaimers Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 76 All rights reserved. Date of release: 4 February 2008 Document identifier: TDA8295_1 ...