PRTR5V0U2X,215 NXP Semiconductors, PRTR5V0U2X,215 Datasheet - Page 6

• Manufacturer Part Number: PRTR5V0U2X,215
• Description: DIODE ESD PROTECTION SOT143B
• Manufacturer: NXP Semiconductors

Specifications of PRTR5V0U2X,215

• Package / Case: SOT-143, SOT-143B, TO-253AA
• Voltage - Reverse Standoff (typ): 5.5V
• Voltage - Breakdown: 6V
• Polarization: 2 Channel Array - Bidirectional
• Mounting Type: Surface Mount
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4140-2; 934058998215; PRTR5V0U2X T/R; PRTR5V0U2X T/R

NXP Semiconductors
7. Application information
PRTR5V0U2X_2
Product data sheet
Handling data rates up to 480 Mbit/s, USB 2.0 interfaces require ESD protection devices
with an extremely low line capacitance in order to avoid signal distortion.
With a capacitance of only 1 pF, the PRTR5V0U2X offers IEC 61000-4-2, level 4
compliant ESD protection.
The PRTR5V0U2X integrates two pairs of ultra low capacitance rail-to-rail ESD protection
diodes and an additional ESD protection diode.
The additional ESD protection diode connected between ground and V
charging of the supply.
To achieve the maximum ESD protection level, no additional external capacitors are
required.
Circuit board layout and protection device placement
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the PRTR5V0U2X as close to the input terminal or connector as possible.
2. The path length between the PRTR5V0U2X and the protected line should be
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer PCBs, use ground
Fig 5. Application diagram: USB 2.0
minimized.
ground loops.
vias.
USB controller
Rev. 02 — 14 January 2008
Ultra low capacitance double rail-to-rail ESD protection diode
D
D
common mode
choke
V
BUS
protected IC/device
D
D
006aaa485
PRTR5V0U2X
GND
V
BUS
CC
© NXP B.V. 2008. All rights reserved.
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