ESDALC6V1-5T6 STMicroelectronics, ESDALC6V1-5T6 Datasheet
ESDALC6V1-5T6
Specifications of ESDALC6V1-5T6
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ESDALC6V1-5T6 Summary of contents
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... Communication systems ■ Video equipment ■ Set top boxes Description The ESDALC6V1-5T6 is monolithic arrays designed to protect lines against ESD transients. The device is ideal for applications where both reduced print circuit board space and high ESD protection level are required. March 2011 ...
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... Symbol V = Breakdown voltage Leakage current @ Stand-off voltage RM Table 2. Electrical characteristics (values, T Symbol DC 2/11 amb Parameter (1) Parameter RM Test conditions = 1 MHz rms osc osc Doc ID 16741 Rev 2 ESDALC6V1-5T6 = 25 °C) Value initial = amb 2 125 -55 + 150 260 Slope: 1 °C) amb Min. Typ. Max. 6.1 7 Unit ° ...
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... ESDALC6V1-5T6 Figure 3. Relative variation of peak pulse power versus initial junction temperature P [T initial]/P [T initial = 25 ° 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 Figure 5. Clamping voltage versus peak pulse current (typical values, exponential waveform) I (A) PP 10.0 Wave 8/20 µ °C 1 ...
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... F/Hz -140.00 100.0M 1.0G Figure 12. ESD response to IEC 61000-4-2 5 V/Div C2 100 ns/Div Doc ID 16741 Rev 2 ESDALC6V1-5T6 between channels 100.0K 1.0M 10.0M 100.0M 1.0G (-15 kV air discharge) on each channel ESDA LC 6V1 5T6 F/Hz 100 ns/Div ...
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... ESDALC6V1-5T6 3 Package information ● Epoxy meets UL94, V0 ● Lead-free package In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ® ECOPACK trademark. Table 3. ...
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... Figure 16. Tape and reel specifications Dot identifying Pin 1 location 0.23 ± 0.02 0.53± 0.05 All dimensions in mm 6/11 2.0 ± 0.05 4.0 ± 0 1.13 ± 0.05 User direction of unreeling Doc ID 16741 Rev 2 ESDALC6V1-5T6 Ø 1.50 + 0.10 / -0.00 K 2.0 ± 0.05 ...
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... ESDALC6V1-5T6 4 Recommendation on PCB assembly 4.1 Stencil opening design 1. General recommendation on stencil opening design a) Stencil opening dimensions: L (Length), W (Width), T (Thickness). Figure 17. Stencil opening dimensions b) General design rule Stencil thickness ( 125 µm Aspect Ratio Aspect Area 2. Reference design a) Stencil opening thickness: 100 µm b) Stencil opening for leads: Opening to footprint ratio is 100% ...
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... To control the solder paste amount, the closed via is recommended instead of open vias. 2. The position of tracks and open vias in the solder area should be well balanced. The symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away. 8/11 Doc ID 16741 Rev 2 ESDALC6V1-5T6 ...
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... ESDALC6V1-5T6 4.5 Reflow profile Figure 19. ST ECOPACK Temperature (°C) Temperature (°C) 260°C max 260°C max 255°C 255°C 220°C 220°C 180°C 180°C 125 °C 125 ° Note: Minimize air convection currents in the reflow oven to avoid component movement. ...
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... The marking can be rotated by multiples of 90° to differentiate assembly location 6 Revision history Table 5. Document revision history Date 05-Nov-2009 03-Mar-2011 10/11 Marking Package (1) DFN1.0 x1.0-6L K Revision 1 Initial release. 2 Added Figure 15 and following note. Added footnote Doc ID 16741 Rev 2 ESDALC6V1-5T6 Weight Base qty Delivery mode 1.78 mg 3000 Tape and reel Changes toTable 4. ...
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... ESDALC6V1-5T6 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...