PIC18F26J50-I/SS Microchip Technology, PIC18F26J50-I/SS Datasheet - Page 30
![IC PIC MCU FLASH 64K 2V 28-SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC18F26J50-I/SS
Manufacturer Part Number
PIC18F26J50-I/SS
Description
IC PIC MCU FLASH 64K 2V 28-SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18LF24J50-ISS.pdf
(554 pages)
3.PIC18LF24J50-ISS.pdf
(12 pages)
Specifications of PIC18F26J50-I/SS
Core Size
8-Bit
Program Memory Size
64KB (32K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC18
No. Of I/o's
16
Ram Memory Size
3.6875KB
Cpu Speed
48MHz
No. Of Timers
2
Interface
EUSART, I2C, SPI, USB
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183032, DV164136, MA180024, DM183022
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Package
28SSOP
Device Core
PIC
Family Name
PIC18
Maximum Speed
48 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
Eeprom Size
-
Lead Free Status / Rohs Status
Details
PIC18F2XJXX/4XJXX FAMILY
6.0
DS39687E-page 30
Standard Operating Conditions
Operating Temperature: 25°C is recommended
Param
P1
P2
P2A
P2B
P3
P4
P5
P5A
P6
P9
P10
P11
P12
P13
P14
P16
P17
P19
P20
Note 1:
No.
2:
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
Symbol
AC/DC CHARACTERISTICS TIMING REQUIREMENTS
FOR PROGRAM/VERIFY TEST MODE (CONTINUED)
DLY
R
PGC
PGCL
PGCH
SET
HLD
DLY
DLY
DLY
DLY
DLY
HLD
SET
VALID
DLY
HLD
KEY
KEY
External power must be supplied to the V
Section 2.1.1 “PIC18F2XJXX/4XJXX/ LF2XJXX/LF4XJXX Devices and the On-Chip Voltage Regulator” for
more information.
V
of V
1
1
1
1
2
5
6
7
2
2
8
3
1
2
DD
A
DD
must also be supplied to the AV
MCLR Rise Time to Enter Program/Verify
mode
Serial Clock (PGC) Period
Serial Clock (PGC) Low Time
Serial Clock (PGC) High Time
Input Data Setup Time to Serial Clock ↓
Input Data Hold Time from PGC ↓
Delay Between 4-Bit Command and
Command Operand
Delay Between 4-Bit Command Operand and
Next 4-Bit Command
Delay Between Last PGC ↓ of Command Byte
to First PGC ↑ of Read of Data Word
Delay to allow Block Programming to Occur
Delay to allow Row Erase to Occur
Delay to allow Bulk Erase to Occur
Input Data Hold Time from MCLR ↑
V
Data Out Valid from PGC ↑
Delay Between Last PGC ↓ and MCLR ↓
MCLR ↓ to V
Delay from First MCLR ↓ to First PGC ↑ for
Key Sequence on PGD
Delay from Last PGC ↓ for Key Sequence on
PGD to Second MCLR ↑
and V
DD
↑ Setup Time to MCLR ↑
SS
, respectively.
DD
Characteristic
↓
DD
pins during programming. AV
DDCORE
/V
CAP
pin if the on-chip voltage regulator is disabled. See
Min
100
475
524
400
100
3.4
1.2
50
50
20
20
50
50
20
49
54
25
20
50
—
3
4
Max
1.0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
DD
and AV
Units
ms
ms
ms
ms
ms
ms
ms
μs
ns
ns
ns
ns
ns
ns
ns
ns
μs
ns
ns
ns
μs
ns
SS
© 2009 Microchip Technology Inc.
should always be within ±0.3V
PIC18F2XJ10/PIC18F4XJ10
PIC18F2XJ11/PIC18F4XJ11/
PIC18F2XJ13/PIC18F4XJ13/
PIC18F2XJ5X/PIC18F4XJ5X
PIC18F2XJ10/PIC18F4XJ10/
PIC18F2XJ13/PIC18F4XJ13/
PIC18F2XJ53/PIC18F4XJ53
PIC18F2XJ11/PIC18F4XJ11/
PIC18F2XJ50/PIC18F4XJ50
PIC18F2XJ10/PIC18F4XJ10/
PIC18F2XJ13/PIC18F4XJ13/
PIC18F2XJ53/PIC18F4XJ53
PIC18F2XJ11/PIC18F4XJ11/
PIC18F2XJ50/PIC18F4XJ50
Conditions