DSPIC30F2011-20I/P Microchip Technology, DSPIC30F2011-20I/P Datasheet - Page 29
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DSPIC30F2011-20I/P
Manufacturer Part Number
DSPIC30F2011-20I/P
Description
IC DSPIC MCU/DSP 12K 18DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20ISO.pdf
(210 pages)
3.DSPIC30F2011-20ISO.pdf
(14 pages)
4.DSPIC30F2011-20ISO.pdf
(6 pages)
5.DSPIC30F2011-20ISO.pdf
(18 pages)
6.DSPIC30F2011-20IP.pdf
(26 pages)
7.DSPIC30F2011-20IP.pdf
(206 pages)
Specifications of DSPIC30F2011-20I/P
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-DIP (0.300", 7.62mm)
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
12
Flash Memory Size
12KB
Supply Voltage Range
2.5V To 5.5V
Package
18PDIP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
12
Interface Type
I2C/SPI/UART
On-chip Adc
8-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC30F005 - MODULE SCKT DSPIC30F 18DIP/SOICACICE0202 - ADAPTER MPLABICE 18P 300 MIL
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F2011-20IP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F2011-20I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
8.5.9
The ERASEP command erases the specified number of
rows of code memory from the specified base address.
The specified base address must be a multiple of 0x40.
Once the erase is performed, all targeted words of
code memory contain 0xFFFFFF.
Expected Response (2 words):
0x1900
0x0002
© 2010 Microchip Technology Inc.
15
Opcode
Length
Num_Rows
Addr_MSB
Addr_LS
Note:
Opcode
Field
Num_Rows
12 11
ERASEP COMMAND
The ERASEP command cannot be used to
erase the Configuration registers or
device ID. Code-protect Configuration
registers can only be erased with the
ERASEB command, while the device ID is
read-only.
0x9
0x3
Number of rows to erase
MSB of 24-bit base address
LS 16 bits of 24-bit base address
Addr_LS
8 7
Description
Length
Addr_MSB
0
8.5.10
The QBLANK command queries the programming exec-
utive to determine if the contents of code memory and
data EEPROM are blank (contains all ‘1’s). The size of
code memory and data EEPROM to check must be
specified in the command.
The Blank Check for code memory begins at 0x0 and
advances toward larger addresses for the specified
number of instruction words. The Blank Check for data
EEPROM begins at 0x7FFFFE and advances toward
smaller addresses for the specified number of data
words.
QBLANK returns a QE_Code of 0xF0 if the specified
code memory and data EEPROM are blank.
Otherwise, QBLANK returns a QE_Code of 0x0F.
Expected Response (2 words for blank device):
0x1AF0
0x0002
Expected Response (2 words for non-blank device):
0x1A0F
0x0002
15
Opcode
Length
PSize
Reserved
DSize
Note:
Reserved
Opcode
Field
12 11
QBLANK COMMAND
The QBLANK command does not check
the system Configuration registers. The
READD command must be used to deter-
mine the state of the Configuration
registers.
0xA
0x3
Length of program memory to check
(in 24-bit words), max of 49152
0x0
Length of data memory to check
(in 16-bit words), max of 2048
PSize
Description
Length
DSize
DS70102K-page 29
0