DSPIC30F2011-20I/P Microchip Technology, DSPIC30F2011-20I/P Datasheet - Page 61
![IC DSPIC MCU/DSP 12K 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
DSPIC30F2011-20I/P
Manufacturer Part Number
DSPIC30F2011-20I/P
Description
IC DSPIC MCU/DSP 12K 18DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F2011-20ISO.pdf
(210 pages)
3.DSPIC30F2011-20ISO.pdf
(14 pages)
4.DSPIC30F2011-20ISO.pdf
(6 pages)
5.DSPIC30F2011-20ISO.pdf
(18 pages)
6.DSPIC30F2011-20IP.pdf
(26 pages)
7.DSPIC30F2011-20IP.pdf
(206 pages)
Specifications of DSPIC30F2011-20I/P
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
12
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
18-DIP (0.300", 7.62mm)
Core Frequency
40MHz
Core Supply Voltage
5.5V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
12
Flash Memory Size
12KB
Supply Voltage Range
2.5V To 5.5V
Package
18PDIP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
12
Interface Type
I2C/SPI/UART
On-chip Adc
8-chx12-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC30F005 - MODULE SCKT DSPIC30F 18DIP/SOICACICE0202 - ADAPTER MPLABICE 18P 300 MIL
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
DSPIC30F2011-20IP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F2011-20I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
TABLE A-1:
© 2010 Microchip Technology Inc.
dsPIC30F5016
dsPIC30F6010
dsPIC30F6010A
dsPIC30F6011
dsPIC30F6011A
dsPIC30F6012
dsPIC30F6012A
dsPIC30F6013
dsPIC30F6013A
dsPIC30F6014
dsPIC30F6014A
dsPIC30F6015
Item Description:
SUM(a:b) = Byte sum of locations a to b inclusive (all 3 bytes of code memory)
CFGB
Device
= Configuration Block (masked) = Byte sum of ((FOSC&0xC10F) + (FWDT&0x803F) +
(FBORPOR&0x87B3) + (FBS&0x310F) + (FSS&0x330F) + (FGS&0x0007) + (FICD&0xC003))
CHECKSUM COMPUTATION (CONTINUED)
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Disabled
Enabled
Read Code
Protection
CFGB+SUM(0:00AFFF)
CFGB
CFGB+SUM(0:017FFF)
CFGB
CFGB+SUM(0:017FFF)
CFGB
CFGB+SUM(0:015FFF)
CFGB
CFGB+SUM(0:015FFF)
CFGB
CFGB+SUM(0:017FFF)
CFGB
CFGB+SUM(0:017FFF)
CFGB
CFGB+SUM(0:015FFF)
CFGB
CFGB+SUM(0:015FFF)
CFGB
CFGB+SUM(0:017FFF)
CFGB
CFGB+SUM(0:017FFF)
CFGB
CFGB+SUM(0:017FFF)
CFGB
Checksum Computation
0xFC06
0xC406
0xC406
0xC406
0xC406
0xC406
0xC406
0xC406
Erased
0xF406
0xF406
0xF406
0xF406
0x0404
0x0404
0x0404
0x0404
0x0404
0x0404
0x0404
0x0404
0x0404
0x0404
0x0404
0x0404
Value
0xAAAAAA at 0x0
Code Address
Value with
and Last
0xC208
0xC208
0xC208
0xC208
0xC208
0xC208
0xC208
0xFA08
0xF208
0xF208
0xF208
0xF208
DS70102K-page 61
0x0404
0x0404
0x0404
0x0404
0x0404
0x0404
0x0404
0x0404
0x0404
0x0404
0x0404
0x0404