ATMEGA8535L-8JU Atmel, ATMEGA8535L-8JU Datasheet - Page 153

• Manufacturer Part Number: ATMEGA8535L-8JU
• Description: MCU AVR 8K ISP FLASH MEM 44-PLCC
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8535L-8JU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Processor Series: ATMEGA8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 512Byte
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PLCC
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Sending Frames with 9 Data
Bits
Transmitter Flags and
Interrupts
2502K–AVR–10/06
If 9-bit characters are used (UCSZ = 7), the ninth bit must be written to the TXB8 bit in
UCSRB before the low byte of the character is written to UDR. The following code
examples show a transmit function that handles 9-bit characters. For the assembly
code, the data to be sent is assumed to be stored in registers R17:R16.
Note:
The ninth bit can be used for indicating an address frame when using multi processor
communication mode or for other protocol handling as for example synchronization.
The USART Transmitter has two flags that indicate its state: USART Data Register
Empty (UDRE) and Transmit Complete (TXC). Both flags can be used for generating
interrupts.
The Data Register Empty (UDRE) Flag indicates whether the transmit buffer is ready to
receive new data. This bit is set when the transmit buffer is empty, and cleared when the
transmit buffer contains data to be transmitted that has not yet been moved into the Shift
Register. For compatibility with future devices, always write this bit to zero when writing
the UCSRA Register.
When the Data Register Empty Interrupt Enable (UDRIE) bit in UCSRB is written to one,
the USART Data Register Empty interrupt will be executed as long as UDRE is set (pro-
vided that global interrupts are enabled). UDRE is cleared by writing UDR. When
Assembly Code Example
C Code Example
USART_Transmit:
void USART_Transmit( unsigned int data )
{
}
; Wait for empty transmit buffer
sbis UCSRA,UDRE
rjmp USART_Transmit
; Copy 9th bit from r17 to TXB8
cbi
sbrc r17,0
sbi
; Put LSB data (r16) into buffer, sends the data
out
ret
/* Wait for empty transmit buffer */
while ( !( UCSRA & (1<<UDRE))) )
/* Copy 9th bit to TXB8 */
UCSRB &= ~(1<<TXB8);
if ( data & 0x0100 )
/* Put data into buffer, sends the data */
UDR = data;
1. These transmit functions are written to be general functions. They can be optimized if
UCSRB |= (1<<TXB8);
the contents of the UCSRB is static. (For example, only the TXB8 bit of the UCSRB
Register is used after initialization.)
UCSRB,TXB8
UCSRB,TXB8
UDR,r16
;
(1)
(1)
ATmega8535(L)
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