ATMEGA8535L-8JU Atmel, ATMEGA8535L-8JU Datasheet - Page 34

• Manufacturer Part Number: ATMEGA8535L-8JU
• Description: MCU AVR 8K ISP FLASH MEM 44-PLCC
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8535L-8JU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Processor Series: ATMEGA8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 512Byte
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PLCC
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Standby Mode
Extended Standby Mode
Table 14. Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
Notes:
34
Sleep
Mode
Idle
ADC
Noise
Reduction
Power-
down
Power-
save
Standby
Extended
Standby
1. External Crystal or resonator selected as clock source
2. If AS
3. Only INT2 or level interrupt INT1 and INT0
(1)
(1)
ATmega8535(L)
clk
CPU
2
bit in ASSR is set
clk
Active Clock domains
FLASH
clk
X
IO
asynchronous timer should be considered undefined after wake-up in Power-save mode
if AS2 is 0.
This sleep mode basically halts all clocks except clk
chronous modules, including Timer/Counter2 if clocked asynchronously.
When the SM2..0 bits are 110 and an external crystal/resonator clock option is selected,
the SLEEP instruction makes the MCU enter Standby mode. This mode is identical to
Power-down with the exception that the Oscillator is kept running. From Standby mode,
the device wakes up in six clock cycles.
When the SM2..0 bits are 111 and an external crystal/resonator clock option is selected,
the SLEEP instruction makes the MCU enter Extended Standby mode. This mode is
identical to Power-save mode with the exception that the Oscillator is kept running.
From Extended Standby mode, the device wakes up in six clock cycles.
clk
X
X
ADC
clk
X
X
X
X
ASY
(2)
(2)
Enabled
Source
Clock
Main
X
X
X
X
Oscillators
Enabled
Timer
Osc
X
X
X
X
(2)
(2)
(2)
(2)
INT2
INT1
INT0
X
X
X
X
X
X
(3)
(3)
(3)
(3)
(3)
Address
Match
TWI
X
X
X
X
X
X
ASY
, allowing operation only of asyn-
Wake up sources
Timer
X
X
X
X
2
(2)
(2)
EEPROM
Ready
SPM/
X
X
2502K–AVR–10/06
A
D
C
X
X
Other
I/O
X