PIC18F86J90-I/PT Microchip Technology, PIC18F86J90-I/PT Datasheet - Page 224

• Manufacturer Part Number: PIC18F86J90-I/PT
• Description: IC PIC MCU FLASH 64KB 80-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F86J90-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 64KB (32K x 16)
• Package / Case: 80-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 67
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3923 B
• Interface Type: AUSART, EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 67
• Number Of Timers: 4
• Operating Supply Voltage: 2.65 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87J90 FAMILY
REGISTER 18-6:
DS39933D-page 224
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-2
bit 1
bit 0
Note 1:
R/W-0
GCEN
If the I
writes to the SSPBUF are disabled).
GCEN: General Call Enable bit
1 = Enable interrupt when a general call address (0000h) is received in the SSPSR
0 = General call address disabled
ACKSTAT: Acknowledge Status bit
Unused in Slave mode.
ADMSK<5:2>: Slave Address Mask Select bits
1 = Masking of corresponding bits of SSPADD is enabled
0 = Masking of corresponding bits of SSPADD is disabled
ADMSK1: Slave Address Least Significant bit(s) Mask Select bit
In 7-Bit Addressing mode:
1 = Masking of SSPADD<1> only is enabled
0 = Masking of SSPADD<1> only is disabled
In 10-Bit Addressing mode:
1 = Masking of SSPADD<1:0> is enabled
0 = Masking of SSPADD<1:0> is disabled
SEN: Stretch Enable bit
1 = Clock stretching is enabled for both slave transmit and slave receive (stretch enabled)
0 = Clock stretching is disabled
ACKSTAT
2
R/W-0
C™ module is active, this bit may not be set (no spooling) and the SSPBUF may not be written (or
SSPCON2: MSSP CONTROL REGISTER 2 (I
W = Writable bit
‘1’ = Bit is set
ADMSK5
R/W-0
(1)
ADMSK4
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
ADMSK3
R/W-0
2
C™ SLAVE MODE)
ADMSK2
R/W-0
 2010 Microchip Technology Inc.
x = Bit is unknown
ADMSK1
R/W-0
SEN
R/W-0
(1)
bit 0