PIC18F86J90-I/PT Microchip Technology, PIC18F86J90-I/PT Datasheet - Page 62

• Manufacturer Part Number: PIC18F86J90-I/PT
• Description: IC PIC MCU FLASH 64KB 80-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F86J90-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 64KB (32K x 16)
• Package / Case: 80-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 67
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3923 B
• Interface Type: AUSART, EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 67
• Number Of Timers: 4
• Operating Supply Voltage: 2.65 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164328 - MODULE SKT FOR 80TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87J90 FAMILY
TABLE 5-2:
DS39933D-page 62
IPR3
PIR3
PIE3
IPR2
PIR2
PIE2
IPR1
PIR1
PIE1
OSCTUNE
TRISJ
TRISH
TRISG
TRISF
TRISE
TRISD
TRISC
TRISB
TRISA
LATJ
LATH
LATG
LATF
LATE
LATD
LATC
LATB
LATA
PORTJ
PORTH
PORTG
PORTF
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Note 1:
Register
(5)
2:
3:
4:
5:
(5)
Shaded cells indicate conditions do not apply for the designated device.
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
See Table 5-1 for Reset value for specific conditions.
Bits 6 and 7 of PORTA, LATA and TRISA are enabled depending on the oscillator mode selected. When
not enabled as PORTA pins, they are disabled and read as ‘0’.
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INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Applicable Devices
PIC18F8XJ90
PIC18F8XJ90
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Brown-out Reset
Power-on Reset,
-111 1111
-000 0000
-000 0000
11-- 111-
00-- 000-
00-- 000-
-111 1-11
-000 0-00
-000 0-00
0000 0000
1111 1111
1111 1111
0001 1111
1111 111-
1111 1-11
1111 1111
1111 1111
1111 1111
1111 1111
xxxx xxxx
xxxx xxxx
00-x xxxx
xxxx xxx-
xxxx x-xx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
000x xxxx
xxxx xxx-
(5)
(5)
RESET Instruction
MCLR Resets
Stack Resets
-111 1111
-000 0000
-000 0000
11-- 111-
00-- 000-
00-- 000-
-111 1-11
-000 0-00
-000 0-00
0000 0000
1111 1111
1111 1111
0001 1111
1111 111-
1111 1-11
1111 1111
1111 1111
1111 1111
1111 1111
uuuu uuuu
uuuu uuuu
00-u uuuu
uuuu uuu-
uuuu u-uu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
000u uuuu
uuuu uuu-
WDT Reset
 2010 Microchip Technology Inc.
(5)
(5)
Wake-up via WDT
-uuu 1111
-uuu 0000
-uuu 0000
uu-- uuu-
uu-- uuu-
uu-- uuu-
-uuu u-uu
-uuu u-uu
-uuu u-uu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuu-
uuuu u-uu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uu-u uuuu
uuuu uuu-
uuuu u-uu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
000u uuuu
uuuu uuu-
uuuu uuuu
uuuu uuuu
or Interrupt
(3)
(3)
(3)
(5)
(5)