PIC18F8410-I/PT Microchip Technology, PIC18F8410-I/PT Datasheet - Page 256
PIC18F8410-I/PT
Manufacturer Part Number
PIC18F8410-I/PT
Description
IC PIC MCU FLASH 8KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F6310-IPT.pdf
(412 pages)
2.PIC18F6310-IPT.pdf
(16 pages)
3.PIC18F6310-IPT.pdf
(4 pages)
4.PIC18F6310-IPT.pdf
(28 pages)
5.PIC18F6310-IPT.pdf
(6 pages)
6.PIC18F6310-IPT.pdf
(4 pages)
7.PIC18F8410-IPT.pdf
(404 pages)
Specifications of PIC18F8410-I/PT
Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
70
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Controller Family/series
PIC18
No. Of I/o's
70
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
5
Interface
I2C, SPI, USART
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
SPI, I2C, EUSART, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
70
Number Of Timers
4
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F8410-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC18F6310/6410/8310/8410
19.8
An A/D conversion can be started by the “Special Event
Trigger” of the CCP2 module. This requires that the
CCP2M3:CCP2M0 bits (CCP2CON<3:0>) be pro-
grammed as ‘1011’ and that the A/D module is enabled
(ADON bit is set). When the trigger occurs, the
GO/DONE bit will be set, starting the A/D acquisition
and conversion and the Timer1 (or Timer3) counter will
be reset to zero. Timer1 (or Timer3) is reset to auto-
matically repeat the A/D acquisition period with minimal
TABLE 19-2:
DS39635B-page 254
INTCON
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
ADRESH
ADRESL
ADCON0
ADCON1
ADCON2
PORTA
TRISA
PORTF
TRISF
LATF
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used for A/D conversion.
Note 1:
Name
Use of the CCP2 Trigger
These pins may be configured as port pins depending on the oscillator mode selected.
PORTF Data Direction Register
LATF Output Latch Register
A/D Result Register High Byte
TRISA7
GIE/GIEH PEIE/GIEL TMR0IE
A/D Result Register Low Byte
OSCFIE
OSCFIP
OSCFIF
PSPIF
PSPIE
PSPIP
RA7
ADFM
Bit 7
RF7
—
—
REGISTERS ASSOCIATED WITH A/D OPERATION
(1)
(1)
TRISA6
RA6
CMIF
CMIE
CMIP
ADIE
ADIP
ADIF
Bit 6
RF6
—
—
—
(1)
(1)
PORTA Data Direction Register
VCFG1
ACQT2
RC1IF
RC1IE
RC1IP
CHS3
Bit 5
RA5
RF5
—
—
—
VCFG0
ACQT1
INT0IE
Preliminary
TX1IF
TX1IE
TX1IP
CHS2
Bit 4
RA4
RF4
—
—
—
PCFG3
ACQT0
SSPIE
SSPIP
SSPIF
BCLIF
BCLIE
BCLIP
CHS1
software overhead (moving ADRESH/ADRESL to the
desired location). The appropriate analog input
channel must be selected and the minimum acquisition
period is either timed by the user, or an appropriate
T
sets the GO/DONE bit (starts a conversion).
If the A/D module is not enabled (ADON is cleared), the
“Special Event Trigger” will be ignored by the A/D
module, but will still reset the Timer1 (or Timer3)
counter.
RBIE
Bit 3
RA3
RF3
ACQ
time selected before the “Special Event Trigger”
TMR0IF
CCP1IF
CCP1IE
CCP1IP
HLVDIF
HLVDIE
HLVDIP
PCFG2
ADCS2
CHS0
Bit 2
RA2
RF2
GO/DONE
TMR2IF
TMR2IE
TMR2IP
TMR3IF
TMR3IE
TMR3IP
PCFG1
ADCS1
INT0IF
Bit 1
© 2007 Microchip Technology Inc.
RA1
RF1
TMR1IF
TMR1IE
TMR1IP
CCP2IE
CCP2IP
CCP2IF
PCFG0
ADCS0
ADON
RBIF
Bit 0
RA0
RF0
on Page
Values
Reset
57
59
59
59
59
59
59
58
58
58
58
58
60
60
60
60
60
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