AT89C5122D-RDRUM Atmel, AT89C5122D-RDRUM Datasheet - Page 150

• Manufacturer Part Number: AT89C5122D-RDRUM
• Description: IC 8051 MCU 32K CRAM USB 64-VQFP
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C5122D-RDRUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: SmartCard, SPI, UART/USART, USB
• Peripherals: LED, POR, WDT
• Number Of I /o: 46
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-03 - KIT STARTER FOR MCU AT8XC5122/23
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Other names: AT89C5122D-RDRUMTR

Registers
150
AT83R5122, AT8xC5122/23
Timer/Counter Control Register
Table 88. TCON (S:88h)
Reset Value = 0000 0000b
Number
TF1
Bit
7
7
6
5
4
3
2
1
0
Mnemonic Description
TR1
TR1
TR0
Bit
TF1
TF0
IE1
IT1
IE0
IT0
6
Timer 1 Overflow flag
Cleared by the hardware when processor vectors interrupt routine.
Set by the hardware when Timer 1 register overflows.
Timer 1 Run Control bit
Clear to turn off Timer/Counter 1.
Set to turn on Timer/Counter 1.
Timer 0 Overflow flag
Cleared by the hardware when processor vectors interrupt routine or by software
when the interrupt is disabled
Set by the hardware when Timer 0 register overflows.
Timer 0 Run Control bit
Clear to turn off Timer/Counter 0.
Set to turn on Timer/Counter 0.
Interrupt 1 Edge flag
Cleared by the hardware when interrupt is processed if edge-triggered (see IT1).
Set by the hardware when external interrupt is detected on the INT1# pin.
Interrupt 1 Type Control bit
Clear to select low level active (level triggered) for external interrupt 1 (INT1#).
Set to select falling edge active (edge triggered) for external interrupt 1.
Interrupt 0 Edge flag
Cleared by the hardware when interrupt is processed if edge-triggered (see IT0).
Set by the hardware when external interrupt is detected on INT0# pin.
Interrupt 0 Type Control bit
Clear to select low level active (level triggered) for external interrupt 0 (INT0#).
Set to select falling edge active (edge triggered) for external interrupt 0.
TF0
5
TR0
4
IE1
3
IT1
2
IE0
1
4202F–SCR–07/2008
IT0
0