ATMEGA3250PV-10AU Atmel, ATMEGA3250PV-10AU Datasheet - Page 272

• Manufacturer Part Number: ATMEGA3250PV-10AU
• Description: IC MCU AVR 32K FLASH 100-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA3250PV-10AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Processor Series: ATMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, UART, USI
• Maximum Clock Frequency: 10 MHz
• Number Of Programmable I/os: 69
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Data Rom Size: 1 KB
• Operating Supply Voltage: 1.8 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• A/d Bit Size: 10 bit
• A/d Channels Available: 8
• Height: 1 mm
• Length: 14 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Width: 14 mm
• For Use With: ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK504 - STARTER KIT AVR EXP MOD 100P LCD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATMEGA3250PV-8AU; ATMEGA3250PV-8AU

25.2
272
Fuse Bits
ATmega325P/3250P
Table 25-2.
Notes:
The ATmega325P/3250P has three Fuse bytes.
functionality of all the fuses and how they are mapped into the Fuse bytes. Note that the fuses
are read as logical zero, “0”, if they are programmed.
Table 25-3.
Notes:
–
–
–
–
–
BODLEVEL1
BODLEVEL0
RSTDISBL
BLB1 Mode
Extended Fuse Byte
1
2
3
4
1. Program the Fuse bits and Boot Lock bits before programming the LB1 and LB2.
2. “1” means unprogrammed, “0” means programmed
1. See
2. Port G, PG5 is input only. Pull-up is always on. See
Memory Lock Bits
(2)
(1)
(1)
Lock Bit Protection Modes
Extended Fuse Byte
”System and Reset Characterizations” on page 308
BLB12
1
1
0
0
7
6
5
4
5
2
1
0
Bit No
BLB11
1
0
0
1
Description
–
–
–
–
–
Brown-out Detector trigger level
Brown-out Detector trigger level
External Reset Disable
Protection Type
No restrictions for SPM or LPM accessing the Boot Loader
section.
SPM is not allowed to write to the Boot Loader section.
SPM is not allowed to write to the Boot Loader section, and LPM
executing from the Application section is not allowed to read
from the Boot Loader section. If Interrupt Vectors are placed in
the Application section, interrupts are disabled while executing
from the Boot Loader section.
LPM executing from the Application section is not allowed to
read from the Boot Loader section. If Interrupt Vectors are
placed in the Application section, interrupts are disabled while
executing from the Boot Loader section.
(1)(2)
(Continued)
Table 25-3
”Alternate Functions of Port G” on page 79
-
for BODLEVEL Fuse decoding.
Table 25-5
Default Value
1
1
1
1
1
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
describe briefly the
8023F–AVR–07/09