ATMEGA644P-20PU Atmel, ATMEGA644P-20PU Datasheet - Page 315
ATMEGA644P-20PU
Manufacturer Part Number
ATMEGA644P-20PU
Description
IC MCU AVR 64K FLASH 40-DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA644P-20PU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
2-Wire/JTAG/SPI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Quantity
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24.10.8
24.10.9
24.10.10 Programming Command Register
8011O–AVR–07/10
Reset Register
Programming Enable Register
The Reset Register is a Test Data Register used to reset the part during programming. It is
required to reset the part before entering Programming mode.
A high value in the Reset Register corresponds to pulling the external reset low. The part is reset
as long as there is a high value present in the Reset Register. Depending on the Fuse settings
for the clock options, the part will remain reset for a Reset Time-out period (refer to
Sources” on page
not latched, so the reset will take place immediately, as shown in
The Programming Enable Register is a 16-bit register. The contents of this register is compared
to the programming enable signature, binary code 0b1010_0011_0111_0000. When the con-
tents of the register is equal to the programming enable signature, programming via the JTAG
port is enabled. The register is reset to 0 on Power-on Reset, and should always be reset when
leaving Programming mode.
Figure 24-14. Programming Enable Register
The Programming Command Register is a 15-bit register. This register is used to serially shift in
programming commands, and to serially shift out the result of the previous command, if any. The
JTAG Programming Instruction Set is shown in
when shifting in the programming commands is illustrated in
30) after releasing the Reset Register. The output from this Data Register is
TDO
TDI
D
A
A
T
0xA370
=
ClockDR & PROG_ENABLE
D
Table 24-18 on page
ATmega164P/324P/644P
Q
Programming Enable
Figure 24-16 on page
Figure 22-2 on page
317. The state sequence
320.
268.
”Clock
315
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