PIC24FJ256GB110-I/PF Microchip Technology, PIC24FJ256GB110-I/PF Datasheet - Page 20

• Manufacturer Part Number: PIC24FJ256GB110-I/PF
• Description: IC PIC MCU FLASH 256K 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Fr

Specifications of PIC24FJ256GB110-I/PF

• Program Memory Type: FLASH
• Program Memory Size: 256KB (85.5K x 24)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 83
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 84
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DM240011
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARDDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24FJ256GB110 FAMILY
TABLE 1-4:
DS39897C-page 20
D+
D-
DMH
DMLN
DPH
DPLN
ENVREG
INT0
MCLR
OSCI
OSCO
PGEC1
PGED1
PGEC2
PGED2
PGEC3
PGED3
PMA0
PMA1
PMA2
PMA3
PMA4
PMA5
PMA6
PMA7
PMA8
PMA9
PMA10
PMA11
PMA12
PMA13
PMCS1
PMCS2
PMBE
Legend:
Function
TTL = TTL input buffer
ANA = Analog level input/output
TQFP, QFN
64-Pin
37
36
46
42
50
43
57
46
39
40
15
16
17
18
11
12
30
29
16
22
32
31
28
27
24
23
45
44
51
7
8
6
5
4
PIC24FJ256GB110 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Pin Number
80-Pin
TQFP
47
46
58
54
62
55
71
58
49
50
19
20
21
22
15
16
36
35
10
24
23
40
39
34
33
30
29
57
56
63
9
8
7
6
100-Pin
TQFP
57
56
72
68
77
69
86
72
13
63
64
24
25
26
27
20
21
44
43
14
12
11
10
29
28
50
49
42
41
35
34
71
70
78
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
ST/TTL
Buffer
Input
ANA
ANA
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST = Schmitt Trigger input buffer
I
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2
C™ = I
USB Differential Plus line (internal transceiver).
USB Differential Minus line (internal transceiver).
D- External Pull-up Control Output.
D- External Pull-down Control Output.
D+ External Pull-up Control Output.
D+ External Pull-down Control Output.
Voltage Regulator Enable.
External Interrupt Input.
Master Clear (device Reset) Input. This line is brought low
to cause a Reset.
Main Oscillator Input Connection.
Main Oscillator Output Connection.
In-Circuit Debugger/Emulator/ICSP™ Programming Clock.
In-Circuit Debugger/Emulator/ICSP Programming Data.
In-Circuit Debugger/Emulator/ICSP Programming Clock.
In-Circuit Debugger/Emulator/ICSP Programming Data.
In-Circuit Debugger/Emulator/ICSP Programming Clock.
In-Circuit Debugger/Emulator/ICSP Programming Data.
Parallel Master Port Address Bit 0 Input (Buffered Slave
modes) and Output (Master modes).
Parallel Master Port Address Bit 1 Input (Buffered Slave
modes) and Output (Master modes).
Parallel Master Port Address (Demultiplexed Master
modes).
Parallel Master Port Chip Select 1 Strobe/Address Bit 15.
Parallel Master Port Chip Select 2 Strobe/Address Bit 14.
Parallel Master Port Byte Enable Strobe.
2
C/SMBus input buffer
Description
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