AT91SAM7L128-CU Atmel, AT91SAM7L128-CU Datasheet - Page 310
![MCU ARM7 128K HS FLASH 144-LFBGA](/photos/12/13/121356/144-lfbga_sml.jpg)
AT91SAM7L128-CU
Manufacturer Part Number
AT91SAM7L128-CU
Description
MCU ARM7 128K HS FLASH 144-LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM7L64-CU.pdf
(564 pages)
Specifications of AT91SAM7L128-CU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
36MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
80
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.55 V ~ 1.8 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFBGA
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
6 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
36 MHz
Number Of Programmable I/os
80
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
For Use With
AT91SAM7L-STK - KIT EVAL FOR AT91SAM7LAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM7L128-CU
Manufacturer:
Atmel
Quantity:
2 660
- Current page: 310 of 564
- Download datasheet (9Mb)
28.7.4
Name:
Access Type:
• TD: Transmit Data
Data to be transmitted by the SPI Interface is stored in this register. Information to be transmitted must be written to the
transmit data register in a right-justified format.
• PCS: Peripheral Chip Select
This field is only used if Variable Peripheral Select is active (PS = 1).
If PCSDEC = 0:
If PCSDEC = 1:
• LASTXFER: Last Transfer
0 = No effect.
1 = The current NPCS will be deasserted after the character written in TD has been transferred. When CSAAT is set, this
allows to close the communication with the current serial peripheral by raising the corresponding NPCS line as soon as TD
transfer has completed.
This field is only used if Variable Peripheral Select is active (PS = 1).
310
PCS = xxx0
PCS = xx01
PCS = x011
PCS = 0111
PCS = 1111
(x = don’t care)
NPCS[3:0] output signals = PCS
31
23
15
–
–
7
AT91SAM7L128/64 Preliminary
SPI Transmit Data Register
30
22
14
SPI_TDR
Write-only
–
–
6
NPCS[3:0] = 1110
NPCS[3:0] = 1101
NPCS[3:0] = 0111
forbidden (no peripheral is selected)
NPCS[3:0] = 1011
29
21
13
–
–
5
28
20
12
–
–
4
TD
TD
27
19
11
–
3
26
18
10
–
2
PCS
25
17
–
9
1
6257A–ATARM–20-Feb-08
LASTXFER
24
16
8
0
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