LPC1767FBD100,551 NXP Semiconductors, LPC1767FBD100,551 Datasheet - Page 51

• Manufacturer Part Number: LPC1767FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1767FBD100,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: LPC17
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4967; 935289808551

NXP Semiconductors
Table 13.
C
[1]
LPC1768_67_66_65_64_3
Product data sheet
Symbol
t
t
t
V
t
t
t
t
t
t
r
f
FRFM
FEOPT
FDEOP
JR1
JR2
EOPR1
EOPR2
L
Fig 16. Differential data-to-EOP transition skew and EOP width
CRS
= 50 pF; R
Characterized but not implemented as production test. Guaranteed by design.
T
differential
data lines
PERIOD
Dynamic characteristics: USB pins (full-speed)
pu
= 1.5 k
11.7 USB interface (LPC1768/66/65/64 only)
Parameter
rise time
fall time
differential rise and fall time
matching
output signal crossover voltage
source SE0 interval of EOP
source jitter for differential transition
to SE0 transition
receiver jitter to next transition
receiver jitter for paired transitions
EOP width at receiver
EOP width at receiver
Ω
on D+ to V
n × T
differential data to
crossover point
DD(3V3)
SE0/EOP skew
PERIOD
, unless otherwise specified.
+ t
FDEOP
Rev. 03 — 19 November 2009
Conditions
10 % to 90 %
10 % to 90 %
see
see
10 % to 90 %
must reject as
EOP; see
Figure 16
must accept as
EOP; see
Figure 16
t
r
/ t
Figure 16
Figure 16
f
crossover point
extended
LPC1768/67/66/65/64
[1]
[1]
32-bit ARM Cortex-M3 microcontroller
Min
8.5
7.7
-
1.3
160
−2
−18.5
−9
40
82
source EOP width: t
receiver EOP width: t
Typ
-
-
-
-
-
-
-
-
-
-
© NXP B.V. 2009. All rights reserved.
Max
13.8
13.7
109
2.0
175
+5
+18.5
+9
-
-
FEOPT
002aab561
EOPR1
, t
EOPR2
Unit
ns
ns
%
V
ns
ns
ns
ns
ns
ns
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