C8051F501-IQ Silicon Laboratories Inc, C8051F501-IQ Datasheet - Page 97

• Manufacturer Part Number: C8051F501-IQ
• Description: IC 8051 MCU 64K FLASH 48-QFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F50xr

Specifications of C8051F501-IQ

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 48-QFP
• Mfg Application Notes: LIN Bootloader AppNote
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 40
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.25 V
• Data Converters: A/D 32x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: C8051F5x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4.25 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F500DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 32-ch x 12-bit
• Package: 48PQFP
• Device Core: 8051
• Family Name: C8051F50x
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1527 - KIT DEV FOR C8051F50X
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1512

12. Memory Organization
The memory organization of the CIP-51 System Controller is similar to that of a standard 8051. There are
two separate memory spaces: program memory and data memory. Program and data memory share the
same address space but are accessed via different instruction types. The memory organization is shown in
Figure 12.1
0x7FFF
0xFBFF
0x0000
0xFC00
0x0000
PROGRAM/DATA MEMORY
C8051F504/5/6/7-F510/1
Programmable in 512
Programmable in 512
C8051F500/1/2/3/8/9
(FLASH)
32 kB FLASH
Byte Sectors)
64 kB FLASH
Byte Sectors)
RESERVED
(In-System
(In-System
Figure 12.1. C8051F50x/F51x Memory Map
0xFF
0x7F
0x2F
0x1F
0x80
0x30
0x20
0x00
Rev. 1.2
(Indirect Addressing
(Direct and Indirect
INTERNAL DATA ADDRESS SPACE
EXTERNAL DATA ADDRESS SPACE
General Purpose
Upper 128 RAM
Bit Addressable
Addressing)
0xFFFF
0x0FFF
Registers
0x1000
0x0000
Only)
DATA MEMORY (RAM)
from 0x0000 to 0x0FFF,
wrapped on 4096-byte
Same 4096 bytes as
MOVX instruction)
(accessable using
C8051F50x/F51x
4K Bytes
boundaries
XRAM
(Direct Addressing Only)
Special Function
Lower 128 RAM
(Direct and Indirect
Addressing)
Register's
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