MC9S08AW60CFGE Freescale Semiconductor, MC9S08AW60CFGE Datasheet - Page 103
![IC MCU 64K FLASH 44-LQFP](/photos/12/17/121739/mc9s08aw60cfde_sml.jpg)
MC9S08AW60CFGE
Manufacturer Part Number
MC9S08AW60CFGE
Description
IC MCU 64K FLASH 44-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08AW32CFDE.pdf
(324 pages)
Specifications of MC9S08AW60CFGE
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-LQFP
Processor Series
S08AW
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
34
Number Of Timers
8
Operating Supply Voltage
- 0.3 V to + 5.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08AW60E
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
For Use With
DEMO9S08AW60E - DEMO BOARD FOR MC9S08AW60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08AW60CFGE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MC9S08AW60CFGER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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6.7.11
Port F parallel I/O function is controlled by the registers listed below.
Freescale Semiconductor
PTFDD[7:0]
PTFD[7:0]
Reset
Reset
Field
Field
7:0
7:0
W
W
R
R
PTFDD7
PTFD7
Port F I/O Registers (PTFD and PTFDD)
Port F Data Register Bits— For port F pins that are inputs, reads return the logic level on the pin. For port F
pins that are configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port F pins that are configured as outputs, the logic level is
driven out the corresponding MCU pin.
Reset forces PTFD to all 0s, but these 0s are not driven out the corresponding pins because reset also configures
all port pins as high-impedance inputs with pullups disabled.
Data Direction for Port F Bits — These read/write bits control the direction of port F pins and what is read for
PTFD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port F bit n and PTFD reads return the contents of PTFDn.
0
0
7
7
PTFDD6
PTFD6
0
0
6
6
Table 6-28. PTFDD Register Field Descriptions
Figure 6-35. Data Direction for Port F (PTFDD)
Table 6-27. PTFD Register Field Descriptions
Figure 6-34. Port F Data Register (PTFD)
PTFDD5
PTFD5
0
0
5
5
MC9S08AW60 Data Sheet, Rev 2
PTFDD4
PTFD4
0
0
4
4
Description
Description
PTFDD3
PTFD3
3
0
3
0
PTFDD2
PTFD2
0
0
2
2
Chapter 6 Parallel Input/Output
PTFDD1
PTFD1
0
0
1
1
PTFDD0
PTFD0
0
0
0
0
103
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