R5F212B7SNFP#U0 Renesas Electronics America, R5F212B7SNFP#U0 Datasheet - Page 460

• Manufacturer Part Number: R5F212B7SNFP#U0
• Description: IC R8C/2B MCU FLASH 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/2Br

Specifications of R5F212B7SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 55
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/2A Group, R8C/2B Group
Rev.2.00
REJ09B0324-0200
Figure 16.35
Figure 16.36
(slave output)
ICSR register
ICSR register
(master output)
(master output)
ICDRS register
ICDRT register
(master output)
(master output)
(slave output)
ICSR register
ICSR register
TDRE bit in
TEND bit in
ICDRS register
ICDRT register
Nov 26, 2007
TDRE bit in
TEND bit in
by program
Processing
by program
Processing
SDA
SDA
SDA
SCL
SDA
SCL
Operating Timing in Master Transmit Mode (I
Operating Timing in Master Transmit Mode (I
1
0
1
0
1
0
1
0
(2) Instruction of
(3) Data write to ICDRT
start condition
generation
register
Page 438 of 580
9
A
b7
1
b7
1
b6
(3) Data write to ICDRT
2
register (1st byte)
b6
2
b5
3
b5
Slave address
3
Address + R/W
b4
4
b4
4
Address + R/W
Data n
b3
5
Data n
b3
5
b2
(4) Data write to ICDRT
6
register (2nd byte)
b2
6
b1
7
2
2
C bus Interface Mode) (1)
C bus Interface Mode) (2)
b1
7
b0
R/W
8
(6) Generate stop condition and
16. Clock Synchronous Serial Interface
b0
set TEND bit to 0
8
A
9
A/A
9
(7) Set to slave receive mode
(5) Data write to ICDRT
register (3rd byte)
Data 1
Data 1
b7
1
Data 2
b6
2