R5F212B7SNFP#U0 Renesas Electronics America, R5F212B7SNFP#U0 Datasheet - Page 570

• Manufacturer Part Number: R5F212B7SNFP#U0
• Description: IC R8C/2B MCU FLASH 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/2Br

Specifications of R5F212B7SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 55
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 64-LQFP
• For Use With: R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/2A Group, R8C/2B Group
Rev.2.00
REJ09B0324-0200
22.2.5
Sample programs 1 to 3 are for preventing the I flag from being set to 1 (interrupts enabled) before the interrupt
control register is changed for reasons of the internal bus or the instruction queue buffer.
Example 1:
Example 2:
Example 3:
(a) The contents of an interrupt control register can only be changed while no interrupt requests
(b) When changing the contents of an interrupt control register after disabling interrupts, be careful to
(c) When disabling interrupts using the I flag, set the I flag as shown in the sample programs below. Refer
INT_SWITCH1:
INT_SWITCH2:
INT_SWITCH3:
Nov 26, 2007
Changing Interrupt Control Register Contents
corresponding to that register are generated. If interrupt requests may be generated, disable interrupts
before changing the interrupt control register contents.
choose appropriate instructions.
Changing any bit other than IR bit
If an interrupt request corresponding to a register is generated while executing the instruction, the IR bit
may not be set to 1 (interrupt requested), and the interrupt request may be ignored. If this causes a
problem, use the following instructions to change the register: AND, OR, BCLR, BSET
Changing IR bit
If the IR bit is set to 0 (interrupt not requested), it may not be set to 0 depending on the instruction used.
Therefore, use the MOV instruction to set the IR bit to 0.
to (b) regarding changing the contents of interrupt control registers by the sample programs.
FCLR
AND.B
NOP
NOP
FSET
FCLR
AND.B
MOV.W MEM,R0
FSET
PUSHC FLG
FCLR
AND.B
POPC
Use NOP instructions to prevent I flag from being set to 1 before interrupt control register
is changed
Use dummy read to delay FSET instruction
Use POPC instruction to change I flag
I
#00H,0056H
I
I
#00H,0056H
I
I
#00H,0056H
FLG
Page 548 of 580
; Disable interrupts
; Set TRAIC register to 00h
;
; Enable interrupts
; Disable interrupts
; Set TRAIC register to 00h
; Dummy read
; Enable interrupts
; Disable interrupts
; Set TRAIC register to 00h
; Enable interrupts
22. Usage Notes