MC908AP32CBE Freescale Semiconductor, MC908AP32CBE Datasheet - Page 165

IC MCU 32K FLASH 8MHZ 42DIP

MC908AP32CBE

Manufacturer Part Number
MC908AP32CBE
Description
IC MCU 32K FLASH 8MHZ 42DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908AP32CBE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
30
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
Controller Family/series
HC08
No. Of I/o's
30
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08AP
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
FSICEBASE, DEMO908AP64E, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
The maximum percent difference between the receiver count and the transmitter count of a slow 9-bit
character with no errors is
Fast Data Tolerance
Figure 11-8
or a framing error. The fast stop bit ends at RT10 instead of RT16 but is still there for the stop bit data
samples at RT8, RT9, and RT10.
For an 8-bit character, data sampling of the stop bit takes the receiver
9 bit times × 16 RT cycles + 10 RT cycles = 154 RT cycles.
With the misaligned character shown in
the count of the transmitting device is
10 bit times × 16 RT cycles = 160 RT cycles.
The maximum percent difference between the receiver count and the transmitter count of a fast 8-bit
character with no errors is
For a 9-bit character, data sampling of the stop bit takes the receiver
10 bit times × 16 RT cycles + 10 RT cycles = 170 RT cycles.
With the misaligned character shown in
the count of the transmitting device is
11 bit times × 16 RT cycles = 176 RT cycles.
The maximum percent difference between the receiver count and the transmitter count of a fast 9-bit
character with no errors is
11.4.3.6 Receiver Wakeup
So that the MCU can ignore transmissions intended only for other receivers in multiple-receiver systems,
the receiver can be put into a standby state. Setting the receiver wakeup bit, RWU, in SCC2 puts the
receiver into a standby state during which receiver interrupts are disabled.
Freescale Semiconductor
shows how much a fast received character can be misaligned without causing a noise error
RECEIVER
RT CLOCK
MC68HC908AP Family Data Sheet, Rev. 4
Figure
Figure
170 176
------------------------- -
170 163
------------------------- -
154 160
------------------------- -
Figure 11-8. Fast Data
STOP
170
170
154
11-8, the receiver counts 154 RT cycles at the point when
11-8, the receiver counts 170 RT cycles at the point when
×
×
×
100
100
100
SAMPLES
=
=
=
DATA
3.53%
4.12%
3.90%
˙
IDLE OR NEXT CHARACTER
Functional Description
165

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