HD64F3664FPV Renesas Electronics America, HD64F3664FPV Datasheet - Page 113

• Manufacturer Part Number: HD64F3664FPV
• Description: IC H8/3664 MCU FLASH 32K 64LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H Tinyr

Specifications of HD64F3664FPV

• Core Size: 16-Bit
• Program Memory Size: 32KB (32K x 8)
• Oscillator Type: External
• Core Processor: H8/300H
• Speed: 16MHz
• Connectivity: I²C, SCI
• Peripherals: PWM, WDT
• Number Of I /o: 29
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-LQFP
• No. Of I/o's: 29
• Ram Memory Size: 2KB
• Cpu Speed: 16MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage: RoHS Compliant
• Controller Family/series: H8/300H
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 6.3
Function
System clock oscillator
Subclock oscillator
CPU
operations
RAM
IO ports
External
interrupts
Peripheral
functions
Note:
6.2.1
In sleep mode, CPU operation is halted but the on-chip peripheral modules function at the clock
frequency set by the MA2, MA1, and MA0 bits in SYSCR2. CPU register contents are retained.
When an interrupt is requested, sleep mode is cleared and interrupt exception handling starts.
Sleep mode is not cleared if the I bit of the condition code register (CCR) is set to 1 or the
requested interrupt is disabled in the interrupt enable register. After sleep mode is cleared, a
transition is made to active mode when the LSON bit in SYSCR2 is 0, and a transition is made to
subactive mode when the bit is 1.
When the RES pin goes low, the CPU goes into the reset state and sleep mode is cleared.
*
Registers can be read or written in subactive mode.
Sleep Mode
Instructions
Registers
IRQ3 to IRQ0
WKP5 to WKP0 Functioning
Timer A
Timer V
Timer W
Watchdog timer Functioning
SCI3
IIC
A/D converter
Internal State in Each Operating Mode
Functioning
Functioning
Active Mode
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Sleep Mode
Functioning
Functioning
Halted
Retained
Retained
Retained
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Halted
Subactive
Mode
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning
Functioning if the timekeeping time-base
function is selected, and retained if not selected
Reset
Retained (if internal clock φ is
selected as a count clock, the
counter is incremented by a
subclock*)
Retained (functioning if the internal oscillator is
selected as a count clock*)
Reset
Retained*
Reset
Rev. 5.00, 03/04, page 85 of 388
Subsleep
Mode
Halted
Functioning
Halted
Retained
Retained
Retained
Functioning
Functioning
Reset
Reset
Retained
Reset
Halted
Standby Mode
Functioning
Halted
Retained
Retained
Register
contents are
retained, but
output is the
high-impedance
state.
Functioning
Functioning
Reset
Retained
Reset
Retained
Reset