MC56F8346MFVE Freescale Semiconductor, MC56F8346MFVE Datasheet - Page 27

• Manufacturer Part Number: MC56F8346MFVE
• Description: IC DSP 16BIT 60MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8346MFVE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 60MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 62
• Program Memory Size: 136KB (68K x 16)
• Program Memory Type: FLASH
• Ram Size: 6K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F83xx
• Core: 56800E
• Numeric And Arithmetic Format: Fixed-Point
• Device Million Instructions Per Second: 60 MIPs
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 62
• Data Ram Size: 4 KB
• Operating Supply Voltage: 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Interface Type: SCI, SPI, CAN
• Minimum Operating Temperature: - 40 C
• For Use With: MC56F8367EVME - EVAL BOARD FOR MC56F83X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
Preliminary
Signal Name
(GPIOD9)
(GPIOE0)
GPIOD0
GPIOD1
(CS1)
(CS2)
(CS3)
TXD0
DS
Table 2-2 Signal and Package Information for the 144 Pin LQFP
Pin No.
47
48
49
4
Output
Output
Output
Output
Output
Output
Input/
Input/
Input/
Type
disabled,
pull-up is
disabled,
pull-up is
output is
output is
In reset,
enabled
enabled
In reset,
enabled
During
pull-up
56F8346 Technical Data, Rev. 15
Reset
Input,
State
Data Memory Select — This signal is actually CS1 in the EMI,
which is programmed at reset for compatibility with the 56F80x DS
signal. DS is asserted low for external data memory access.
Depending upon the state of the DRV bit in the EMI bus control
register (BCR), DS is tri-stated when the external bus is inactive.
CS1 resets to provide the DS function as defined on the 56F80x
devices.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
To deactivate the internal pull-up resistor, clear bit 9 in the
GPIOD_PUR register.
Port D GPIO — These two GPIO pins can be individually
programmed as input or output pins.
Chip Select — CS2 - CS3 may be programmed within the EMI
module to act as chip selects for specific areas of the external
memory map.
Depending upon the state of the DRV bit in the EMI bus control
register (BCR), CS2 - CS3 are tri-stated when the external bus is
inactive.
Most designs will want to change the DRV state to DRV = 1 instead of
using the default setting.
At reset, these pins are configured as GPIO.
To deactivate the internal pull-up resistor, clear the appropriate
GPIO bit in the GPIOD_PUR register.
Example: GPIOD0, clear bit 0 in the GPIOD_PUR register.
Transmit Data — SCI0 transmit data output
Port E GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is SCI output.
To deactivate the internal pull-up resistor, clear bit 0 in the
GPIOE_PUR register.
Signal Description
Signal Pins
27