MC56F8355VFGE Freescale Semiconductor, MC56F8355VFGE Datasheet - Page 66

IC DSP 16BIT 60MHZ 128-LQFP

MC56F8355VFGE

Manufacturer Part Number
MC56F8355VFGE
Description
IC DSP 16BIT 60MHZ 128-LQFP
Manufacturer
Freescale Semiconductor
Series
56F8xxxr
Datasheet

Specifications of MC56F8355VFGE

Core Processor
56800
Core Size
16-Bit
Speed
60MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
49
Program Memory Size
264KB (132K x 16)
Program Memory Type
FLASH
Ram Size
10K x 16
Voltage - Supply (vcc/vdd)
2.25 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
128-LQFP
Data Bus Width
16 bit
Processor Series
MC56F83xx
Core
56800E
Numeric And Arithmetic Format
Fixed-Point
Device Million Instructions Per Second
60 MIPs
Maximum Clock Frequency
60 MHz
Number Of Programmable I/os
49
Data Ram Size
20 KB
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Interface Type
SCI, SPI, CAN
Minimum Operating Temperature
- 40 C
For Use With
MC56F8367EVME - EVAL BOARD FOR MC56F83X
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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66
FMCLKD
FMMCR
FMSECH
FMSECL
SIM_CONTROL
SIM_RSTSTS
SIM_SCR0
SIM_SCR1
SIM_SCR2
SIM_SCR3
SIM_MSH_ID
SIM_LSH_ID
SIM_PUDR
SIM_CLKOSR
SIM_GPS
LVI_CONTROL
LVI_STATUS
SIM_PCE
SIM_ISALH
SIM_ISALL
Register Acronym
Register Acronym
Register Acronym
Table 4-35 System Integration Module Registers Address Map
Table 4-36 Power Supervisor Registers Address Map
Table 4-37 Flash Module Registers Address Map
Address Offset
Address Offset
Address Offset
$0
$1
$3
$4
$C
$D
$A
$B
$E
$0
$1
$0
$1
$2
$3
$4
$5
$6
$7
$8
56F8355 Technical Data, Rev. 17
(SIM_BASE = $00 F350)
(LVI_BASE = $00 F360)
(FM_BASE = $00 F400)
Clock Divider Register
Module Control Register
Reserved
Security High Half Register
Security Low Half Register
Control Register
Reset Status Register
Software Control Register 0
Software Control Register 1
Software Control Register 2
Software Control Register 3
Most Significant Half JTAG ID
Least Significant Half JTAG ID
Pullup Disable Register
Reserved
Clock Out Select Register
Quad Decoder 1 / Timer B / SPI 1 Select Register
Peripheral Clock Enable Register
I/O Short Address Location High Register
I/O Short Address Location Low Register
Control Register
Status Register
Register Description
Register Description
Register Description
Freescale Semiconductor
Preliminary

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