MCF5272CVF66J Freescale Semiconductor, MCF5272CVF66J Datasheet - Page 156

• Manufacturer Part Number: MCF5272CVF66J
• Description: IC MCU 166MHZ 196MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272CVF66J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-MAPBGA
• Processor Series: MCF527x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5272-KIT, NNDK-MOD5270-KIT
• Leaded Process Compatible: No
• Rohs Compliant: No
• Peak Reflow Compatible (260 C): No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: No

Debug Support
5-38
Instruction
movem.l
movem.l
move.w
move.w
move.w
msac.w
msac.w
move.b
mulu.w
muls.w
mac.w
mac.w
mac.w
move.l
move.l
move.l
move.l
move.l
move.l
move.l
move.l
moveq
msac.l
msac.l
muls.l
mulu.l
negx.l
mac.l
mac.l
mac.l
pulse
neg.l
not.l
nop
pea
ori.l
lsl.l
lsr.l
or.l
or.l
Table 5-22. PST/DDATA Specification for User-Mode Instructions (continued)
Operand Syntax
{Dy,#imm},CCR
<ea>y,MACSR
{Dy,#imm},Dx
{Dy,#imm},Dx
MACSR,CCR
Ry,Rx,ea,Rw
Ry,Rx,ea,Rw
<ea>y,<ea>x
<ea>y,<ea>x
<ea>y,MASK
<ea>y,<ea>x
Ry,Rx,ea,Rw
Ry,Rx,ea,Rw
<ea>y,ACC
MACSR,Rx
#list,<ea>x
<ea>y,#list
MASK,Rx
<ea>y,Dx
<ea>y,Dx
<ea>y,Dx
<ea>y,Dx
<ea>y,Dx
Dy,<ea>x
#imm,Dx
#imm,Dx
CCR,Dx
ACC,Rx
MCF5272 ColdFire
<ea>y
Ry,Rx
Ry,Rx
Ry,Rx
Ry,Rx
Dx
Dx
Dx
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1, {PST = 0xB, DD = source operand}
PST = 0x1
PST = 0x1
PST = 0x1, {PST = 0xB, DD = source operand}
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1, {PST = 0x9, DD = source}, {PST = 0x9, DD = destination}
PST = 0x1
PST = 0x1
PST = 0x1, {PST = 0xB, DD = destination},...
PST = 0x1, {PST = 0xB, DD = source},...
PST = 0x1
PST = 0x1
PST = 0x1, {PST = 0xB, DD = source}, {PST = 0xB, DD = destination}
PST = 0x1
PST = 0x1, {PST = 0xB, DD = source}, {PST = 0xB, DD = destination}
PST = 0x1, {PST = 0x9, DD = source operand}
PST = 0x1, {PST = 0xB, DD = source operand}
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1, {PST = 0xB, DD = source operand}
PST = 0x1, {PST = 0xB, DD = source}, {PST = 0xB, DD = destination}
PST = 0x1, {PST = 0xB, DD = destination operand}
PST = 0x4
PST = 0x1, {PST = 0x8, DD = source}, {PST = 0x8, DD = destination}
PST = 0x1, {PST = 0xB, DD = source}, {PST = 0xB, DD = destination}
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1, {PST = 0xB, DD = source operand}
PST = 0x1, {PST = 0x9, DD = source operand}
PST = 0x1
®
Integrated Microprocessor User’s Manual, Rev. 3
PST/DDATA
2
2
Freescale Semiconductor