ADUC7128BSTZ126-RL Analog Devices Inc, ADUC7128BSTZ126-RL Datasheet - Page 16

• Manufacturer Part Number: ADUC7128BSTZ126-RL
• Description: IC DAS MCU ARM7 ADC/DDS 64-LQFP
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7128BSTZ126-RL

• Core Size: 16/32-Bit
• Program Memory Size: 126KB (126K x 8)
• Core Processor: ARM7
• Speed: 41.78MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: PLA, POR, PWM, PSM, Temp Sensor, WDT
• Number Of I /o: 28
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 10x12b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-LQFP
• Controller Family/series: (ARM7) ADUC
• No. Of I/o's: 40
• Cpu Speed: 41.78MHz
• No. Of Timers: 5
• Digital Ic Case Style: LQFP
• Embedded Interface Type: I2C, SPI, UART
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADUC7128QSPZ - KIT DEV FOR ADUC7128
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: ADUC7128BSTZ126-RLTR

ADuC7128/ADuC7129
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 10. ADuC7128 Pin Function Descriptions
Pin
No.
1
2
3
4
5
6
7, 58
8
9
10, 57
11
12
13
14
15
16
17
18
19, 41
20, 42
Mnemonic
ADC5
VDAC
ADC9
ADC10
GND
ADCNEG
AV
ADC12/LD1TX
ADC13/LD2TX
AGND
TMS
TDI
P4.6/SPM10
P4.7/SPM11
P0.0/BM/CMP
P0.6/T1/MRST
TCK
TDO
IOGND
IOV
DD
DD
REF
OUT
OUT
P0.0/BM/CMP
ADC12/LD1TX
ADC13/LD2TX
P0.6/T1/MRST
P4.6/SPM10
P4.7/SPM11
Type
I
O
I
I
S
I
S
I/O
I/O
S
I
I
I/O
I/O
I/O
O
I
O
S
S
VDAC
ADCNEG
GND
ADC10
AGND
ADC5
ADC9
AV
TMS
1
OUT
OUT
REF
TDI
DD
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
Description
Single-Ended or Differential Analog Input 5/Line Driver Input.
Output from DAC Buffer.
Single-Ended or Differential Analog Input 9.
Single-Ended or Differential Analog Input 10.
Ground Voltage Reference for the ADC. For optimal performance, the analog power supply
should be separated from IOGND and DGND.
Bias Point or Negative Analog Input of the ADC in Pseudo Differential Mode. Must be
connected to the ground of the signal to convert. This bias point must be between
0 V and 1 V.
Analog Power.
Single-Ended or Differential Analog Input 12/DAC Differential Negative Output.
Single-Ended or Differential Analog Input 13/DAC Differential Positive Output.
Analog Ground. Ground reference point for the analog circuitry.
JTAG Test Port Input, Test Mode Select. Debug and download access.
JTAG Test Port Input, Test Data In. Debug and download access.
General-Purpose Input and Output Port 4.6/Serial Port Mux Pin 10.
General-Purpose Input and Output Port 4.7/Serial Port Mux Pin 11.
General-Purpose Input and Output Port 0.0/Boot Mode. The ADuC7128 enters download
mode if BM is low at reset and executes code if BM is pulled high at reset through a 1 kΩ
resistor/voltage comparator output.
General-Purpose Output Port 0.6/Timer1 Input/Power-On Reset Output.
JTAG Test Port Input, Test Clock. Debug and download access.
JTAG Test Port Output, Test Data Out. Debug and download access.
Ground for GPIO. Typically connected to DGND.
3.3 V Supply for GPIO and Input of the On-Chip Voltage Regulator.
PIN 1
INDICATOR
Figure 10. ADuC7128 Pin Configuration
ADuC7128
(Not to Scale)
Rev. 0 | Page 16 of 92
TOP VIEW
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
P1.2/SPM2
P1.3/SPM3
P1.4/SPM4
P1.5/SPM5
P4.1/S2
P4.0/S1
IOV
IOGND
P1.6/SPM6
P1.7/SPM7
DGND
PV
XCLKI
XCLKO
P0.7/SPM8/ECLK/XCLK
P2.0/SPM9
DD
DD