PIC18LF248-I/SP Microchip Technology, PIC18LF248-I/SP Datasheet - Page 272
![IC MCU CAN FLASH 8K LP 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC18LF248-I/SP
Manufacturer Part Number
PIC18LF248-I/SP
Description
IC MCU CAN FLASH 8K LP 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18LF242-ISO.pdf
(36 pages)
3.PIC18F248-ISO.pdf
(402 pages)
4.PIC18F248-ISO.pdf
(8 pages)
Specifications of PIC18LF248-I/SP
Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
22
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- PIC16F616T-ISL PDF datasheet
- PIC18LF242-ISO PDF datasheet #2
- PIC18F248-ISO PDF datasheet #3
- PIC18F248-ISO PDF datasheet #4
- Current page: 272 of 402
- Download datasheet (7Mb)
REGISTER 24-9:
REGISTER 24-10: CONFIG7H: CONFIGURATION REGISTER 7 HIGH (BYTE ADDRESS 30000Dh)
DS41159E-page 270
PIC18FXX8
bit 7-4
bit 3
bit 2
bit 1
bit 0
bit 7
bit 6
bit 5-0
CONFIG7L: CONFIGURATION REGISTER 7 LOW (BYTE ADDRESS 30000Ch)
bit 7
Unimplemented: Read as ‘0’
EBTR3: Table Read Protection bit
1 = Block 3 (006000-007FFFh) not protected from table reads executed in other blocks
0 = Block 3 (006000-007FFFh) protected from table reads executed in other blocks
EBTR2: Table Read Protection bit
1 = Block 2 (004000-005FFFh) not protected from table reads executed in other blocks
0 = Block 2 (004000-005FFFh) protected from table reads executed in other blocks
EBTR1: Table Read Protection bit
1 = Block 1 (002000-003FFFh) not protected from table reads executed in other blocks
0 = Block 1 (002000-003FFFh) protected from table reads executed in other blocks
EBTR0: Table Read Protection bit
1 = Block 0 (000200-001FFFh) not protected from table reads executed in other blocks
0 = Block 0 (000200-001FFFh) protected from table reads executed in other blocks
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
Unimplemented: Read as ‘0’
EBTRB: Boot Block Table Read Protection bit
1 = Boot Block (000000-0001FFh) not protected from table reads executed in other blocks
0 = Boot Block (000000-0001FFh) protected from table reads executed in other blocks
Unimplemented: Read as ‘0’
Note 1: Unimplemented in PIC18FX48 devices; maintain this bit set.
U-0
—
U-0
—
EBTRB
R/P-1
U-0
—
P = Programmable bit
P = Programmable bit
U-0
—
U-0
—
(1)
(1)
U-0
—
U-0
—
EBTR3
R/P-1
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
U-0
—
(1)
EBTR2
R/P-1
U-0
—
© 2006 Microchip Technology Inc.
(1)
EBTR1
R/P-1
U-0
—
EBTR0
R/P-1
U-0
—
bit 0
bit 0
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