CY8CLED16P01-48LFXI Cypress Semiconductor Corp, CY8CLED16P01-48LFXI Datasheet - Page 31

• Manufacturer Part Number: CY8CLED16P01-48LFXI
• Description: IC PLC PSOC CMOS LED 16CH 48VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: PowerPSoC® CY8CLEDr

Specifications of CY8CLED16P01-48LFXI

• Core Processor: M8C
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: LED, PLC, POR, PWM, WDT
• Number Of I /o: 44
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 4x14b; D/A 4x9b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1000 - ISP 4PORT FOR CYPRESS PSOC MCU
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Table 10-13. AC Chip-Level Specifications (continued)
Document Number: 001-49263 Rev. *E
F
F
Jitter24M2
T
T
T
T
Jitter32k
T
DC24M
DC
Step24M
Fout48M
Jitter24M1
F
SR
T
32K_U
PLL
PLLSLEW
PLLSLEWLOW
OS
OSACC
XRST
MAX
POWERUP
Symbol
POWER_UP
ILO
Internal Low Speed Oscillator (ILO)
Untrimmed Frequency
PLL Frequency
24 MHz Period Jitter (PLL)
PLL Lock Time
PLL Lock Time for Low Gain Setting
External Crystal Oscillator Startup to 1%
External Crystal Oscillator Startup to 100 ppm
32 kHz Period Jitter
External Reset Pulse Width
24 MHz Duty Cycle
Internal Low Speed Oscillator Duty Cycle
24 MHz Trim Step Size
48 MHz Output Frequency
24 MHz Period Jitter (IMO)
Maximum frequency of signal on row input or
row output.
Power Supply Slew Rate
Time from end of POR to CPU executing code
Enable
Gain
PLL
PLL
F
PLL
Description
0
Figure 10-1. PLL Lock Timing Diagram
T
PLLSLEW
46.8
Min
0.5
0.5
10
40
20
5
–
–
–
–
–
–
–
–
–
–
23.986
48.0
Typ
250
300
100
600
50
50
50
16
–
–
–
–
–
–
–
Max
49.2
12.3
600
500
600
250
100
10
50
60
80
–
–
–
–
24 MHz
Units
V/ms
MHz
MHz
MHz
kHz
kHz
ms
ms
ms
ms
ms
ps
ns
μ s
ps
%
%
After a reset and before the
m8c starts to run, the ILO is
not trimmed. See the System
Resets section of the PSoC
Technical Reference Manual
for details on timing this.
A multiple (x732) of crystal
frequency.
The crystal oscillator
frequency is within 100 ppm
of its final value by the end of
the T
operation assumes a
properly loaded 1 μ W
maximum drive level 32.768
kHz crystal. -40°C ≤ T
85°C.
Trimmed using factory trim
values.
Vdd slew rate during power
up.
Power up from 0V. See the
System Resets section of the
PSoC Technical Reference
Manual.
CY8CLED16P01
OSACC
Notes
period. Correct
Page 31 of 46
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